yosys - Debian dgit repo for package yosys

	Commit message (Expand)	Author	Age
*	Don't be too smart with $dff cells with "init" attribute on out signal	Clifford Wolf	2014-10-16
*	namespace Yosys	Clifford Wolf	2014-09-27
*	Added design->scratchpad	Clifford Wolf	2014-08-30
*	More cleanups related to RTLIL::IdString usage	Clifford Wolf	2014-08-02
*	Renamed port access function on RTLIL::Cell, added param access functions	Clifford Wolf	2014-07-31
*	Refactoring: Renamed RTLIL::Design::modules to modules_	Clifford Wolf	2014-07-27
*	Refactoring: Renamed RTLIL::Module::cells to cells_	Clifford Wolf	2014-07-27
*	Refactoring: Renamed RTLIL::Module::wires to wires_	Clifford Wolf	2014-07-27
*	Changed users of cell->connections_ to the new API (sed command)	Clifford Wolf	2014-07-26
*	Renamed RTLIL::{Module,Cell}::connections to connections_	Clifford Wolf	2014-07-26
*	Use only module->addCell() and module->remove() to create and delete cells	Clifford Wolf	2014-07-25
*	SigSpec refactoring: using the accessor functions everywhere	Clifford Wolf	2014-07-22
*	SigSpec refactoring: renamed chunks and width to __chunks and __width	Clifford Wolf	2014-07-22
*	Fixed detection of init attribute in opt_rmdff	Clifford Wolf	2014-02-04
*	Improved handling of reg init in opt_share and opt_rmdff	Clifford Wolf	2014-02-04
*	Added constant-clock case to opt_rmdff	Clifford Wolf	2014-02-02
*	Added support for $adff with undef data inputs to opt_rmdff	Clifford Wolf	2014-01-17
*	Added log_abort() api	Clifford Wolf	2013-05-24
*	Some improvements in opt_rmdff	Clifford Wolf	2013-05-23
*	Added help messages for opt_* passes	Clifford Wolf	2013-03-01
*	initial import	Clifford Wolf	2013-01-05