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* New upstream version 0.9Ruben Undheim2019-10-18
* New upstream version 0.7+20180830git0b7a184Ruben Undheim2018-08-30
* Imported yosys 0.7Ruben Undheim2016-11-03
* Squashed commit of the following:Ruben Undheim2016-09-23
* Bugfix in mapping $tribuf to $_TBUF_Clifford Wolf2015-11-05
* Import more std:: stuff into Yosys namespaceClifford Wolf2015-10-25
* Added $tribuf and $_TBUF_ cell typesClifford Wolf2015-08-16
* Fixed trailing whitespacesClifford Wolf2015-07-02
* Added simplemap $lut supportClifford Wolf2015-04-27
* Improved attributes API and handling of "src" attributesClifford Wolf2015-04-24
* Fixed simplemap for $ne cells with output width > 1Clifford Wolf2014-12-25
* Improvements in simplemap api, added $ne $nex $eq $eqx supportClifford Wolf2014-12-24
* Renamed extend() to extend_xx(), changed most users to extend_u0()Clifford Wolf2014-12-24
* Added $dffe cell typeClifford Wolf2014-12-08
* Renamed SIZE() to GetSize() because of name collision on Win32Clifford Wolf2014-10-10
* namespace YosysClifford Wolf2014-09-27
* Removed $bu0 cell typeClifford Wolf2014-09-04
* Renamed $_INV_ cell type to $_NOT_Clifford Wolf2014-08-15
* More cleanups related to RTLIL::IdString usageClifford Wolf2014-08-02
* Renamed port access function on RTLIL::Cell, added param access functionsClifford Wolf2014-07-31
* Using log_assert() instead of assert()Clifford Wolf2014-07-28
* Using new obj iterator API in a few placesClifford Wolf2014-07-27
* Refactoring: Renamed RTLIL::Design::modules to modules_Clifford Wolf2014-07-27
* Refactoring: Renamed RTLIL::Module::cells to cells_Clifford Wolf2014-07-27
* Manual fixes for new cell connections APIClifford Wolf2014-07-26
* Changed users of cell->connections_ to the new API (sed command)Clifford Wolf2014-07-26
* Renamed RTLIL::{Module,Cell}::connections to connections_Clifford Wolf2014-07-26
* Use only module->addCell() and module->remove() to create and delete cellsClifford Wolf2014-07-25
* Removed RTLIL::SigSpec::expand() methodClifford Wolf2014-07-23
* SigSpec refactoring: using the accessor functions everywhereClifford Wolf2014-07-22
* SigSpec refactoring: renamed chunks and width to __chunks and __widthClifford Wolf2014-07-22
* Removed deprecated module->new_wire()Clifford Wolf2014-07-21
* Added $slice and $concat cell typesClifford Wolf2014-02-07
* Fixed undef extend for bitwise binary ops (bugs in simplemap and satgen)Clifford Wolf2013-12-29
* Added new cell types to manualClifford Wolf2013-12-28
* Added $bu0 cell (for easy correct $eq/$ne mapping)Clifford Wolf2013-12-28
* Using simplemap mappers from techmapClifford Wolf2013-11-24
* Added simplemap passClifford Wolf2013-11-24