yosys - Debian dgit repo for package yosys

	Commit message (Expand)	Author	Age
*	Fixed various VS warnings	Clifford Wolf	2014-10-18
*	Added genfiles.zip to MXE "make dist"	Clifford Wolf	2014-10-17
*	Removed CHECK() macro from libparse.cc (was using non-std c features)	Clifford Wolf	2014-10-13
*	More Win32 build fixes	Clifford Wolf	2014-10-10
*	Added format __attribute__ to stringf()	Clifford Wolf	2014-10-10
*	Renamed SIZE() to GetSize() because of name collision on Win32	Clifford Wolf	2014-10-10
*	Added mxe-based cross build for win32	Clifford Wolf	2014-10-09
*	Fixes in "hilomap" help message	Clifford Wolf	2014-10-08
*	namespace Yosys	Clifford Wolf	2014-09-27
*	More aggressive $macc merging in alumacc	Clifford Wolf	2014-09-15
*	Added the obvious optimizations to alumacc $macc generator	Clifford Wolf	2014-09-15
*	Improved maccmap tree bit packing	Clifford Wolf	2014-09-15
*	Fixed techmap_wrap for techmap_celltype	Clifford Wolf	2014-09-14
*	Various fixes/cleanups in alumacc and maccmap	Clifford Wolf	2014-09-14
*	Added techmap_wrap attribute	Clifford Wolf	2014-09-14
*	alumacc fix for $pos cells	Clifford Wolf	2014-09-14
*	Extract $alu cells in alumacc	Clifford Wolf	2014-09-14
*	Merge $macc cells in alumacc pass	Clifford Wolf	2014-09-14
*	Basic $macc extract in alumacc	Clifford Wolf	2014-09-14
*	alumacc skeleton	Clifford Wolf	2014-09-14
*	Added "$fa" cell type	Clifford Wolf	2014-09-08
*	Trim msb/lsb zero bits from full adder in maccmap	Clifford Wolf	2014-09-08
*	Added 'techmap_maccmap' techmap attribute	Clifford Wolf	2014-09-07
*	Added "maccmap" command	Clifford Wolf	2014-09-07
*	Removed $bu0 cell type	Clifford Wolf	2014-09-04
*	Added "techmap -autoproc"	Clifford Wolf	2014-09-01
*	Fixed inserting of Q-inverters in dfflibmap	Clifford Wolf	2014-08-27
*	Only call proc_share_dirname() in techmap when necessary	Clifford Wolf	2014-08-23
*	Changed frontend-api from FILE to std::istream	Clifford Wolf	2014-08-23
*	Changed backend-api from FILE to std::ostream	Clifford Wolf	2014-08-23
*	Renamed toposort.h to utils.h	Clifford Wolf	2014-08-17
*	Bugfix in iopadmap	Clifford Wolf	2014-08-15
*	Renamed $_INV_ cell type to $_NOT_	Clifford Wolf	2014-08-15
*	More idstring sort_by_* helpers and fixed tpl ordering in techmap	Clifford Wolf	2014-08-15
*	document "techmap -map %<design-name>"	Clifford Wolf	2014-08-15
*	Added module->ports	Clifford Wolf	2014-08-14
*	Implemented recursive techmap	Clifford Wolf	2014-08-03
*	Implemented simplemap support for "techmap -extern"	Clifford Wolf	2014-08-02
*	Bugfix in "techmap -extern"	Clifford Wolf	2014-08-02
*	No implicit conversion from IdString to anything else	Clifford Wolf	2014-08-02
*	More bugfixes related to new RTLIL::IdString	Clifford Wolf	2014-08-02
*	More cleanups related to RTLIL::IdString usage	Clifford Wolf	2014-08-02
*	Replaced sha1 implementation	Clifford Wolf	2014-08-01
*	Renamed port access function on RTLIL::Cell, added param access functions	Clifford Wolf	2014-07-31
*	Added module->design and cell->module, wire->module pointers	Clifford Wolf	2014-07-31
*	Moved some stuff to kernel/yosys.{h,cc}, using Yosys:: namespace	Clifford Wolf	2014-07-31
*	Renamed "stdcells.v" to "techmap.v"	Clifford Wolf	2014-07-31
*	Added "techmap -assert"	Clifford Wolf	2014-07-31
*	Added techmap CONSTMAP feature	Clifford Wolf	2014-07-30
*	Added "techmap -map %{design-name}"	Clifford Wolf	2014-07-29