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* Only prefer connected signals iff they have public namesClifford Wolf2013-10-17
* Fixed bug in synthesis of memories that are never writtenClifford Wolf2013-10-17
* Avoid re-arranging signals on register outputsClifford Wolf2013-10-17
* Fixed detection of major wires in opt_cleanClifford Wolf2013-10-17
* Added iopadmap passClifford Wolf2013-10-16
* Moved dfflibmap from passes/dfflibmap to passes/techmapClifford Wolf2013-10-16
* Fixed parsing or liberty file statements such as 'clocked_on : "(!CLK)";'Clifford Wolf2013-10-16
* Moved common techlib files to techlibs/commonClifford Wolf2013-09-15
* Some minor documentation fixesClifford Wolf2013-08-21
* Minor fixes in abc build instructions and abc passClifford Wolf2013-08-20
* Added sat -ignore_div_by_zero switchClifford Wolf2013-08-15
* Added eval -brute_force_equiv_checker_x modeClifford Wolf2013-08-15
* Added "clean -purge" and ";;;" supportClifford Wolf2013-08-11
* Added ";;" as shortcut for "; clean;"Clifford Wolf2013-08-11
* freduce performance fixClifford Wolf2013-08-10
* Added techmap -opt modeClifford Wolf2013-08-09
* Some fixes to improve determinismClifford Wolf2013-08-09
* Sort ctrl signals in fsm_extractClifford Wolf2013-08-08
* Added -try option to freduce passClifford Wolf2013-08-08
* Added "clean" command (less verbose opt_clean)Clifford Wolf2013-08-08
* Fixed topological ordering in freduce passClifford Wolf2013-08-07
* Improved handling of private names in opt_clean and rename commandsClifford Wolf2013-08-07
* Small bugfixes in freduce passClifford Wolf2013-08-06
* Added freduce commandClifford Wolf2013-08-06
* Added "design" command (-reset, -save, -load)Clifford Wolf2013-07-27
* Automatically run "proc" on extract map filesClifford Wolf2013-07-24
* Added $lut cells and abc lut mapping supportClifford Wolf2013-07-23
* Bugfixes for empty signal vectorsClifford Wolf2013-07-10
* Added opt_clean -purge optionClifford Wolf2013-07-07
* Fixed handling of $eq and $ne in opt_constClifford Wolf2013-07-07
* Added SAT support for -all/-max with -verifyClifford Wolf2013-06-23
* Merge branch 'master' of github.com:cliffordwolf/yosysClifford Wolf2013-06-20
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| * Added renaming of wires and cells to "rename" commandClifford Wolf2013-06-19
* | Added timout functionality to SAT solverClifford Wolf2013-06-20
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* Added "eval" passClifford Wolf2013-06-19
* Added splitnets commandClifford Wolf2013-06-18
* Added support for "assign" statements in abc vlparseClifford Wolf2013-06-15
* Fixed even more ConstEval bugs found using xsthammerClifford Wolf2013-06-14
* Added consteval testing to xsthammer and fixed bugsClifford Wolf2013-06-13
* More xsthammer improvements (using xst 14.5 now)Clifford Wolf2013-06-13
* Added "scatter" commandClifford Wolf2013-06-12
* Renamed yosys-show temp files to be dot-files in the users home directoryClifford Wolf2013-06-12
* Improvements and fixes in SAT codeClifford Wolf2013-06-10
* Added "rename" commandClifford Wolf2013-06-10
* Renamed "sat_solve" pass to "sat"Clifford Wolf2013-06-09
* Implemented temporal induction proofs in sat_solveClifford Wolf2013-06-09
* Added support for non-temporal proofs to sat_solveClifford Wolf2013-06-09
* Re-organization in sat_solver pass for temporal inductionClifford Wolf2013-06-09
* Added ezSAT api support for don't care values in modelsClifford Wolf2013-06-09
* Fixed handling of $_XOR_ in SAT generatorClifford Wolf2013-06-09