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techlibs
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common
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stdcells.v
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Author
Age
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Fixes for improved techmap of shifts with large B inputs
Clifford Wolf
2014-03-06
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Strictly zero-extend unsigned A-inputs of shift operations in techmap
Clifford Wolf
2014-03-06
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Improved techmap of shift with wide B inputs
Clifford Wolf
2014-03-06
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Added $slice and $concat cell types
Clifford Wolf
2014-02-07
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Removed cases of trailing comma in stdcells.v
Clifford Wolf
2014-01-18
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Various small cleanups in stdcells.v techmap code
Clifford Wolf
2013-12-31
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Added $bu0 cell (for easy correct $eq/$ne mapping)
Clifford Wolf
2013-12-28
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Added support for non-const === and !== (for miter circuits)
Clifford Wolf
2013-12-27
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Using simplemap mappers from techmap
Clifford Wolf
2013-11-24
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Cleanups and bugfixes in response to new internal cell checker
Clifford Wolf
2013-11-11
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Fixed techmap of $reduce_xnor with multi-bit outputs
Clifford Wolf
2013-11-07
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Fixed techmap of $gt and $ge with multi-bit outputs
Clifford Wolf
2013-11-06
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Improved width extension with regard to undef propagation
Clifford Wolf
2013-11-06
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Bugfix in dffsr techmap rules
Clifford Wolf
2013-10-18
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Added techmap rules for $sr, $dffsr and $dlatch
Clifford Wolf
2013-10-18
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Moved common techlib files to techlibs/common
Clifford Wolf
2013-09-15