index
:
yosys
master
Debian dgit repo for package yosys
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
techlibs
/
common
Commit message (
Expand
)
Author
Age
*
New upstream version 0.7+20180830git0b7a184
Ruben Undheim
2018-08-30
*
Imported yosys 0.7
Ruben Undheim
2016-11-03
*
Squashed commit of the following:
Ruben Undheim
2016-09-23
*
Progress in cell library documentation
Clifford Wolf
2016-02-01
*
Run opt_const before check in default scripts
Clifford Wolf
2015-12-22
*
Progress on cell help messages
Clifford Wolf
2015-10-20
*
Progress on cell help messages
Clifford Wolf
2015-10-17
*
Added "prep" command
Clifford Wolf
2015-10-14
*
Added more cell descriptions
Clifford Wolf
2015-10-14
*
Added first help messages for cell types
Clifford Wolf
2015-10-14
*
Added read-enable to memory model
Clifford Wolf
2015-09-25
*
Added $tribuf and $_TBUF_ sim models
Clifford Wolf
2015-08-16
*
Added $tribuf and $_TBUF_ cell types
Clifford Wolf
2015-08-16
*
Another block of spelling fixes
Larry Doolittle
2015-08-14
*
Adjust makefiles to work with out-of-tree builds
Clifford Wolf
2015-08-12
*
Added WORDS parameter to $meminit
Clifford Wolf
2015-07-31
*
Added "synth -nofsm"
Clifford Wolf
2015-07-02
*
Fixed trailing whitespaces
Clifford Wolf
2015-07-02
*
Added "synth -nordff -noalumacc"
Clifford Wolf
2015-06-15
*
Added simplemap $lut support
Clifford Wolf
2015-04-27
*
make all vector-size related integer params in $mem sim model signed
Clifford Wolf
2015-04-05
*
Added $_MUX4_, $_MUX8_, and $_MUX16_ cell types
Clifford Wolf
2015-04-05
*
Added $assume cell type
Clifford Wolf
2015-02-26
*
Added "stat" to "synth" and "synth_xilinx"
Clifford Wolf
2015-02-15
*
Added final checks to "synth" and "synth_xilinx"
Clifford Wolf
2015-02-15
*
Smaller default parameters in $mem simlib model
Clifford Wolf
2015-02-15
*
Added $meminit support to "memory" command
Clifford Wolf
2015-02-14
*
Added $meminit cell type
Clifford Wolf
2015-02-14
*
Added "check" command
Clifford Wolf
2015-02-13
*
Some test related fixes
Clifford Wolf
2015-02-12
*
Added "make mklibyosys", some minor API changes
Clifford Wolf
2015-02-01
*
Added "fsm -encfile"
Clifford Wolf
2015-01-30
*
Added $equiv cell type
Clifford Wolf
2015-01-19
*
Added cells.lib
Clifford Wolf
2015-01-16
*
Added add_share_file Makefile macro
Clifford Wolf
2015-01-08
*
Progress in memory_bram
Clifford Wolf
2015-01-03
*
Added proper clkpol support to memory_bram
Clifford Wolf
2015-01-02
*
New $mem simlib model
Clifford Wolf
2015-01-02
*
Fixed simlib entries for $memrd and $memwr
Clifford Wolf
2014-12-30
*
Fixed build with SMALL=1
Clifford Wolf
2014-12-30
*
Improvements in simplemap api, added $ne $nex $eq $eqx support
Clifford Wolf
2014-12-24
*
Removed UTF-8 chars from techmap.v
Clifford Wolf
2014-12-12
*
Added $dffe cell type
Clifford Wolf
2014-12-08
*
Added $_DFFE_??_ cell types
Clifford Wolf
2014-12-08
*
Added "abc" label in synth script
Clifford Wolf
2014-10-31
*
Added "opt -full" alias for all more aggressive optimizations
Clifford Wolf
2014-10-31
*
Added $_BUF_ cell type
Clifford Wolf
2014-10-03
*
namespace Yosys
Clifford Wolf
2014-09-27
*
Improvements in "synth" script
Clifford Wolf
2014-09-18
*
Fixed $macc simlib model for zero-config
Clifford Wolf
2014-09-16
[next]