Commit message (Collapse) | Author | Age | |
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* | Install simlib in datdir | Clifford Wolf | 2013-11-19 |
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* | Cleanups and bugfixes in response to new internal cell checker | Clifford Wolf | 2013-11-11 |
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* | Fixed techmap of $reduce_xnor with multi-bit outputs | Clifford Wolf | 2013-11-07 |
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* | Fixed techmap of $gt and $ge with multi-bit outputs | Clifford Wolf | 2013-11-06 |
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* | Improved width extension with regard to undef propagation | Clifford Wolf | 2013-11-06 |
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* | Bugfix in dffsr techmap rules | Clifford Wolf | 2013-10-18 |
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* | Added techmap rules for $sr, $dffsr and $dlatch | Clifford Wolf | 2013-10-18 |
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* | Added $_SR_[PN][PN]_, $_DFFSR_[PN][PN][PN]_, $_DLATCH_[PN]_ | Clifford Wolf | 2013-10-18 |
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* | Added $sr, $dffsr and $dlatch cell types | Clifford Wolf | 2013-10-18 |
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* | Moved common techlib files to techlibs/common | Clifford Wolf | 2013-09-15 |