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* Disabled (unused) Xilinx tristate buffersClifford Wolf2015-02-04
* no support for 6-series xilinx devicesClifford Wolf2015-02-01
* Removed old XST-based xilinx examplesClifford Wolf2015-02-01
* Added Xilinx example for Basys3 boardClifford Wolf2015-02-01
* Added missing ports and parameters to xilinx bramsClifford Wolf2015-02-01
* Fixed xilinx FDSE sim modelClifford Wolf2015-01-24
* Various cleanups in xilinx techlibClifford Wolf2015-01-18
* Refactoring of memory_bram and xilinx bramsClifford Wolf2015-01-18
* Added synth_xilinx -retime -flattenClifford Wolf2015-01-17
* Added MUXCY and XORCY support to synth_xilinxClifford Wolf2015-01-17
* Added dff2dffe to synth_xilinxClifford Wolf2015-01-16
* Added more FF types to xilinx/cells.vClifford Wolf2015-01-16
* Fixed xilinx bram clock inverted configClifford Wolf2015-01-16
* Added FF cells to xilinx/cells_sim.vClifford Wolf2015-01-16
* Added Xilinx MUXF7 and MUXF8 supportClifford Wolf2015-01-15
* Various cleanups in synth_xilinx commandClifford Wolf2015-01-13
* Added add_share_file Makefile macroClifford Wolf2015-01-08
* added minimalistic xilinx sim modelsClifford Wolf2015-01-08
* More Xilinx bram cleanupsClifford Wolf2015-01-07
* Cleanups in xilinx bram descriptionsClifford Wolf2015-01-07
* Xilinx RAMB36/RAMB18 memory_bram support completeClifford Wolf2015-01-06
* Towards Xilinx bram supportClifford Wolf2015-01-06
* small fix in xilinx/brams.vClifford Wolf2015-01-06
* Towards Xilinx bram supportClifford Wolf2015-01-06
* Various small improvements to synth_xilinxClifford Wolf2015-01-06
* Towards Xilinx bram supportClifford Wolf2015-01-06
* Towards Xilinx bram supportClifford Wolf2015-01-06
* Towards Xilinx bram supportClifford Wolf2015-01-05
* Towards Xilinx bram supportClifford Wolf2015-01-04
* Progress in memory_bramClifford Wolf2014-12-31
* Added memory_bram (not functional yet)Clifford Wolf2014-12-31
* namespace YosysClifford Wolf2014-09-27
* Renamed $lut ports to follow A-Y naming schemeClifford Wolf2014-08-15
* Added "make PRETTY=1"Clifford Wolf2014-07-24
* Added "techmap -share_map" optionClifford Wolf2013-11-24
* Fixed xilinx/example_sim_counter test benchClifford Wolf2013-11-24
* Added more generic _TECHMAP_ wire mechanism to techmap passClifford Wolf2013-11-23
* [EXAMPLES] Ported the mojo counter example to Zynq ZED board.James Walmsley2013-10-27
* Cleanups in xilinx examplesClifford Wolf2013-10-27
* Added synth_xilinx commandClifford Wolf2013-10-27
* Moved simple xilinx counter sim example to subdirClifford Wolf2013-10-27
* Xilinx mojo_counter example is now workingClifford Wolf2013-10-27
* Renamed techlibs/xilinx7 to techlibs/xilinxClifford Wolf2013-10-26