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Author
Age
*
Fixed iCE40 SB_IO OUTPUT_ENABLE vs. outena_q handling
Clifford Wolf
2015-11-06
*
Bugfix in Xilinx LUT mapping
Clifford Wolf
2015-10-30
*
Progress on cell help messages
Clifford Wolf
2015-10-20
*
Progress on cell help messages
Clifford Wolf
2015-10-17
*
Added "prep" command
Clifford Wolf
2015-10-14
*
Added more cell descriptions
Clifford Wolf
2015-10-14
*
Added first help messages for cell types
Clifford Wolf
2015-10-14
*
Added examples/ top-level directory
Clifford Wolf
2015-10-13
*
Added read-enable to memory model
Clifford Wolf
2015-09-25
*
Added nlutmap
Clifford Wolf
2015-09-18
*
Renamed GreenPAK4 cells, improved GP4 DFF mapping
Clifford Wolf
2015-09-18
*
Fixed copy&paste typo in synth_greenpak4
Clifford Wolf
2015-09-16
*
Added GreenPAK4 skeleton
Clifford Wolf
2015-09-16
*
Fixed ice40 handling of negclk RAM40
Clifford Wolf
2015-09-10
*
Switched to Python 3
Clifford Wolf
2015-08-22
*
Another bugfix for ice40 and xilinx brams_init make rules
Clifford Wolf
2015-08-16
*
Fixed Makefile rules for generated share files
Clifford Wolf
2015-08-16
*
Added $tribuf and $_TBUF_ sim models
Clifford Wolf
2015-08-16
*
Added tribuf command
Clifford Wolf
2015-08-16
*
Added $tribuf and $_TBUF_ cell types
Clifford Wolf
2015-08-16
*
Another block of spelling fixes
Larry Doolittle
2015-08-14
*
Adjust makefiles to work with out-of-tree builds
Clifford Wolf
2015-08-12
*
Improved handling of "keep" attributes in hierarchical designs in opt_clean
Clifford Wolf
2015-08-12
*
Added iCE40 WARMBOOT cell
Marcus Comstedt
2015-08-06
*
Added WORDS parameter to $meminit
Clifford Wolf
2015-07-31
*
Don't write a 17th memory bit in ice40/cells_sim (by Larry Doolittle)
Clifford Wolf
2015-07-27
*
iCE40 DFF sim models: init Q regs to 0
Clifford Wolf
2015-07-20
*
Avoid tristate warning for blackbox ice40/cells_sim.v
Clifford Wolf
2015-07-18
*
Improved liberty file test case
Clifford Wolf
2015-07-06
*
Added "synth -nofsm"
Clifford Wolf
2015-07-02
*
Fixed trailing whitespaces
Clifford Wolf
2015-07-02
*
iCE40: set min bram efficiency to 2%
Clifford Wolf
2015-06-20
*
Added "synth -nordff -noalumacc"
Clifford Wolf
2015-06-15
*
synth_ice40 now flattens by default
Clifford Wolf
2015-06-09
*
Added iCE40 PLL cells
Clifford Wolf
2015-05-31
*
Added output args to synth_ice40
Clifford Wolf
2015-05-26
*
improved ice40 SB_IO sim model
Clifford Wolf
2015-05-23
*
Added ice40 SB_IO sim model
Clifford Wolf
2015-05-23
*
Verific build fixes
Clifford Wolf
2015-05-17
*
ice40_opt bugfix
Clifford Wolf
2015-04-27
*
iCE40: SB_CARRY const fold -> unmap SB_LUT
Clifford Wolf
2015-04-27
*
Added simplemap $lut support
Clifford Wolf
2015-04-27
*
Added iCE40 const folding support for SB_CARRY
Clifford Wolf
2015-04-27
*
Initialization support for all iCE40 bram modes
Clifford Wolf
2015-04-26
*
initialized iCE40 brams (mode 0)
Clifford Wolf
2015-04-25
*
improved iCE40 SB_RAM40_4K simulation model
Clifford Wolf
2015-04-25
*
More iCE40 bram improvements
Clifford Wolf
2015-04-25
*
iCE40 bram progress
Clifford Wolf
2015-04-24
*
iCE40 bram tests and fixes
Clifford Wolf
2015-04-24
*
Added ice40 bram support
Clifford Wolf
2015-04-24
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