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Commit message (Collapse)AuthorAge
* Fixed shift ops with large right hand sideClifford Wolf2013-07-09
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* More fixes for bugs found using xsthammerClifford Wolf2013-06-13
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* More sign-extension related fixesClifford Wolf2013-06-10
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* Implemented technology mapping for multipliers (using array multiplier)Clifford Wolf2013-06-03
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* Fixed clock related parameter names for $memrd and $memwr in techlibs/simlib.vClifford Wolf2013-04-07
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* Added EXTRA_TARGETS Makefile variableClifford Wolf2013-03-28
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* Tiny bugfix in simlib.vClifford Wolf2013-03-26
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* Fixed stdcells.v for $adff with undef reset valueClifford Wolf2013-03-24
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* More support code for $sr cellsClifford Wolf2013-03-14
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* added .gitignore filesClifford Wolf2013-01-05
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* initial importClifford Wolf2013-01-05