yosys - Debian dgit repo for package yosys

	Commit message (Expand)	Author	Age
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*	Added memory_bram "make_outreg" feature	Clifford Wolf	2015-04-09
*	Xilinx DRAMS: RAM64X1D, RAM128X1D	Clifford Wolf	2015-04-09
*	Towards DRAM support in Xilinx flow	Clifford Wolf	2015-04-09
*	Added support for initialized xilinx brams	Clifford Wolf	2015-04-06
*	Added Xilinx test case for initialized brams	Clifford Wolf	2015-04-06
*	Added Xilinx bram black-box modules	Clifford Wolf	2015-04-06
*	make all vector-size related integer params in $mem sim model signed	Clifford Wolf	2015-04-05
*	Added $_MUX4_, $_MUX8_, and $_MUX16_ cell types	Clifford Wolf	2015-04-05
*	Added "dffinit", Support for initialized Xilinx DFF	Clifford Wolf	2015-04-04
*	Fixes in cmos_cells.v	Clifford Wolf	2015-03-25
*	Added very first version of "synth_ice40"	Clifford Wolf	2015-03-05
*	Added $assume cell type	Clifford Wolf	2015-02-26
*	Added "stat" to "synth" and "synth_xilinx"	Clifford Wolf	2015-02-15
*	Added final checks to "synth" and "synth_xilinx"	Clifford Wolf	2015-02-15
*	Smaller default parameters in $mem simlib model	Clifford Wolf	2015-02-15
*	Added $meminit support to "memory" command	Clifford Wolf	2015-02-14
*	Added $meminit cell type	Clifford Wolf	2015-02-14
*	Added "check" command	Clifford Wolf	2015-02-13
*	Some test related fixes	Clifford Wolf	2015-02-12
*	Disabled (unused) Xilinx tristate buffers	Clifford Wolf	2015-02-04
*	no support for 6-series xilinx devices	Clifford Wolf	2015-02-01
*	Removed old XST-based xilinx examples	Clifford Wolf	2015-02-01
*	Added Xilinx example for Basys3 board	Clifford Wolf	2015-02-01
*	Added missing ports and parameters to xilinx brams	Clifford Wolf	2015-02-01
*	Added "make mklibyosys", some minor API changes	Clifford Wolf	2015-02-01
*	Added "fsm -encfile"	Clifford Wolf	2015-01-30
*	Fixed xilinx FDSE sim model	Clifford Wolf	2015-01-24
*	Added $equiv cell type	Clifford Wolf	2015-01-19
*	Various cleanups in xilinx techlib	Clifford Wolf	2015-01-18
*	Refactoring of memory_bram and xilinx brams	Clifford Wolf	2015-01-18
*	Added synth_xilinx -retime -flatten	Clifford Wolf	2015-01-17
*	Added MUXCY and XORCY support to synth_xilinx	Clifford Wolf	2015-01-17
*	Added cells.lib	Clifford Wolf	2015-01-16
*	Added dff2dffe to synth_xilinx	Clifford Wolf	2015-01-16
*	Added more FF types to xilinx/cells.v	Clifford Wolf	2015-01-16
*	Fixed xilinx bram clock inverted config	Clifford Wolf	2015-01-16
*	Added FF cells to xilinx/cells_sim.v	Clifford Wolf	2015-01-16
*	Added Xilinx MUXF7 and MUXF8 support	Clifford Wolf	2015-01-15
*	Various cleanups in synth_xilinx command	Clifford Wolf	2015-01-13
*	Added add_share_file Makefile macro	Clifford Wolf	2015-01-08
*	added minimalistic xilinx sim models	Clifford Wolf	2015-01-08
*	More Xilinx bram cleanups	Clifford Wolf	2015-01-07
*	Cleanups in xilinx bram descriptions	Clifford Wolf	2015-01-07
*	Xilinx RAMB36/RAMB18 memory_bram support complete	Clifford Wolf	2015-01-06
*	Towards Xilinx bram support	Clifford Wolf	2015-01-06
*	small fix in xilinx/brams.v	Clifford Wolf	2015-01-06
*	Towards Xilinx bram support	Clifford Wolf	2015-01-06
*	Various small improvements to synth_xilinx	Clifford Wolf	2015-01-06
*	Towards Xilinx bram support	Clifford Wolf	2015-01-06
*	Towards Xilinx bram support	Clifford Wolf	2015-01-06