path: root/tests/asicworld
Commit message (Expand)AuthorAge
* Imported GIT HEAD: 0.8+20190328git32bd0f2Ruben Undheim2019-03-28
* Imported yosys 0.7Ruben Undheim2016-11-03
* Squashed commit of the following:Ruben Undheim2016-09-23
* Another block of spelling fixesLarry Doolittle2015-08-14
* Fixed CRLF line endingsClifford Wolf2015-08-13
* Some ASCII encoding fixes (comments and docs) by Larry DoolittleClifford Wolf2015-08-13
* Some test related fixesClifford Wolf2015-02-12
* Added autotest -e (do not use -noexpr on write_verilog)Clifford Wolf2014-08-30
* Added "make -j{N}" support to "make test"Clifford Wolf2014-07-30
* Added note to "make test": use git checkout of iverilogClifford Wolf2014-07-16
* Added tests/realmath to "make test"Clifford Wolf2014-06-15
* Fixed undef behavior in tests/asicworld/code_verilog_tutorial_fsm_full_tb.vClifford Wolf2013-05-24
* added more .gitignore files (make test)Clifford Wolf2013-01-05
* initial importClifford Wolf2013-01-05