yosys - Debian dgit repo for package yosys

	Commit message (Collapse)	Author	Age
*	Added read-enable to memory model	Clifford Wolf	2015-09-25
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*	Switched to Python 3	Clifford Wolf	2015-08-22
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*	Another block of spelling fixes	Larry Doolittle	2015-08-14
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*	Spell check (by Larry Doolittle)	Clifford Wolf	2015-08-14
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*	Fixed CRLF line endings	Clifford Wolf	2015-08-13
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*	Some ASCII encoding fixes (comments and docs) by Larry Doolittle	Clifford Wolf	2015-08-13
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*	Fixed trailing whitespaces	Clifford Wolf	2015-07-02
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*	Progress in SMV back-end	Clifford Wolf	2015-06-19
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*	Progress in SMV back-end	Clifford Wolf	2015-06-18
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*	bugfix in blif front-end	Clifford Wolf	2015-05-18
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*	added vloghtb test_febe.sh	Clifford Wolf	2015-05-17
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*	changed file() to open() in python scripts	Clifford Wolf	2015-05-11
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*	Added "pmuxtree" command	Clifford Wolf	2015-04-07
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*	fix for python 2.6.6	Clifford Wolf	2015-03-20
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*	Various fixes for memories with offsets	Clifford Wolf	2015-02-14
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*	Added $meminit support to "memory" command	Clifford Wolf	2015-02-14
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*	Added $meminit test case	Clifford Wolf	2015-02-14
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*	Some test related fixes	Clifford Wolf	2015-02-12
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*	Bugfix in resource sharing test	Clifford Wolf	2015-01-27
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*	Refactoring of memory_bram and xilinx brams	Clifford Wolf	2015-01-18
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*	improvements in muxtree/select_leaves test	Clifford Wolf	2015-01-18
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*	Improvements in opt_muxtree	Clifford Wolf	2015-01-18
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*	Tiny fix in vcdcd.pl	Clifford Wolf	2015-01-13
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*	Added memory_bram "shuffle_enable" feature	Clifford Wolf	2015-01-04
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*	Added "memory -bram"	Clifford Wolf	2015-01-03
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*	Added memory_bram 'or_next_if_better' feature	Clifford Wolf	2015-01-03
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*	memory_bram transp support	Clifford Wolf	2015-01-03
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*	Progress in memory_bram	Clifford Wolf	2015-01-03
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*	Added proper clkpol support to memory_bram	Clifford Wolf	2015-01-02
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*	Fixes and improvements in bram test	Clifford Wolf	2015-01-02
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*	Progress in bram testbench	Clifford Wolf	2015-01-02
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*	Progress in memory_bram	Clifford Wolf	2015-01-02
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*	Progress in memory_bram	Clifford Wolf	2015-01-02
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*	Progress in bram testbench	Clifford Wolf	2015-01-01
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*	Bram testbench (incomplete)	Clifford Wolf	2015-01-01
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*	Added "yosys -qq" to also quiet warning messages	Clifford Wolf	2014-11-09
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*	Added support for task and function args in parentheses	Clifford Wolf	2014-10-27
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*	Added "synth" command	Clifford Wolf	2014-09-14
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*	Fixed autotest for non-basename arguments	Clifford Wolf	2014-09-06
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*	Added tests/various/constmsk_test.ys	Clifford Wolf	2014-09-04
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*	Added autotest -e (do not use -noexpr on write_verilog)	Clifford Wolf	2014-08-30
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*	Cosmetic changes to FSM tests	Clifford Wolf	2014-08-21
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*	Some improvements in FSM mapping and recoding	Clifford Wolf	2014-08-14
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*	Added test_verific mode to tests/fsm/generate.py	Clifford Wolf	2014-08-12
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*	Added multi-dim memory test (requires iverilog git head)	Clifford Wolf	2014-08-12
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*	Fixed FSM mapping for multiple reset-like signals	Clifford Wolf	2014-08-10
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*	Some improvements in fsm_opt and fsm_map for FSM with unreachable states	Clifford Wolf	2014-08-09
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*	Improved FSM tests	Clifford Wolf	2014-08-08
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*	Added FSM test bench	Clifford Wolf	2014-08-08
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*	Improved scope resolution of local regs in Verilog+AST frontend	Clifford Wolf	2014-08-05
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