path: root/tests
Commit message (Expand)AuthorAge
* Added correct handling of $memwr priorityClifford Wolf2014-01-03
* Added -p optionClifford Wolf2014-01-02
* Use "abc -dff" in "make test"Clifford Wolf2013-12-31
* Fixed commented out techmap call in tests/tools/autotest.shClifford Wolf2013-12-31
* Added proper === and !== support in constant expressionsClifford Wolf2013-12-27
* Added multiplier test case from eda playgroundClifford Wolf2013-12-18
* Added elsif preproc supportClifford Wolf2013-12-18
* Added support for macro argumentsClifford Wolf2013-12-18
* Various improvements in support for generate statementsClifford Wolf2013-12-04
* Replaced RTLIL::Const::str with generic decoder methodClifford Wolf2013-12-04
* Fix in sincos testbench genClifford Wolf2013-12-04
* Added sincos test caseClifford Wolf2013-12-04
* Renamed stdcells_sim.v to simcells.v and fixed blackbox.vClifford Wolf2013-11-24
* Removed now obsolete test casesClifford Wolf2013-11-24
* Implemented correct handling of signed module parametersClifford Wolf2013-11-24
* Added modelsim support to autotestClifford Wolf2013-11-24
* Another name resolution bugfix for generate blocksClifford Wolf2013-11-20
* Implemented indexed part selectsClifford Wolf2013-11-20
* Implemented part/bit select on memory readClifford Wolf2013-11-20
* Added additional mem2reg testcaseClifford Wolf2013-11-18
* Fixed parsing of default cases when not last caseClifford Wolf2013-11-18
* Fixed handling of power operatorClifford Wolf2013-11-07
* Behavior should be identical now to rev. 0b4a64ac6adbd6 (next: testing before...Clifford Wolf2013-11-02
* Various ast changes for early expression width detection (prep for constfold ...Clifford Wolf2013-11-02
* Added support for complex set-reset flip-flops in proc_dffClifford Wolf2013-10-24
* Improved handling of dff with async resetsClifford Wolf2013-10-21
* Moved common techlib files to techlibs/commonClifford Wolf2013-09-15
* Added support for "2**n" shifter encodingClifford Wolf2013-08-12
* Added $div and $mod technology mappingClifford Wolf2013-08-09
* More fixes in ternary op sign handlingClifford Wolf2013-07-12
* Fixed sign handling in ternary operatorClifford Wolf2013-07-12
* Another vloghammer related bugfixClifford Wolf2013-07-11
* More fixes in ast expression sign/width handlingClifford Wolf2013-07-09
* Merge branch 'master' of Wolf2013-07-09
| * Major redesign of expr width/sign detecion (verilog/ast frontend)Clifford Wolf2013-07-09
* | Fixed shift ops with large right hand sideClifford Wolf2013-07-09
* Fixed another bug found using vloghammerClifford Wolf2013-07-07
* Removed tests/xsthammerClifford Wolf2013-07-07
* Fixed vivado related xsthammer bugsClifford Wolf2013-07-05
* Various improvements in xsthammer report generatorClifford Wolf2013-07-05
* Added work-around to isim bug in xsthammer report scriptClifford Wolf2013-07-05
* Added CARRY4 Xilinx cell to xsthammer cell libClifford Wolf2013-07-05
* Added xsthammer report generatorClifford Wolf2013-07-05
* Improved xsthammer quartus supportClifford Wolf2013-07-04
* Added Altera Cyclon III cell library to xsthammerClifford Wolf2013-07-04
* Added defparam support to Verilog/AST frontendClifford Wolf2013-07-04
* Added Altera Quartus support to xsthammerClifford Wolf2013-07-03
* Progress in xsthammerClifford Wolf2013-07-03
* Added vivado support to xsthammerClifford Wolf2013-06-26
* Added timout functionality to SAT solverClifford Wolf2013-06-20