From 0fa23a0fe30e7570f2c8897c137e300af2e017f5 Mon Sep 17 00:00:00 2001
From: Ruben Undheim <ruben.undheim@gmail.com>
Date: Sun, 21 Feb 2016 12:22:56 +0100
Subject: Added autopkgtest

---
 debian/changelog          |  7 +++++++
 debian/control            |  3 ++-
 debian/tests/control      |  2 ++
 debian/tests/design_ice.v | 19 +++++++++++++++++++
 debian/tests/ice          | 13 +++++++++++++
 5 files changed, 43 insertions(+), 1 deletion(-)
 create mode 100644 debian/tests/control
 create mode 100644 debian/tests/design_ice.v
 create mode 100755 debian/tests/ice

diff --git a/debian/changelog b/debian/changelog
index 7c3b5c9f..5cecc231 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,3 +1,10 @@
+yosys (0.5.0+20151013gitf13e387-2~exp1) experimental; urgency=low
+
+  * Added autopkg test for synthesis for iCE FPGA.
+  * Updated standards to 3.9.7 - no needed changes
+
+ -- Ruben Undheim <ruben.undheim@gmail.com>  Sun, 21 Feb 2016 12:21:37 +0100
+
 yosys (0.5.0+20151013gitf13e387-1) unstable; urgency=low
 
   * Uploaded to unstable
diff --git a/debian/control b/debian/control
index c3128332..35b4616d 100644
--- a/debian/control
+++ b/debian/control
@@ -3,6 +3,7 @@ Maintainer: Debian Science Maintainers <debian-science-maintainers@lists.alioth.
 Uploaders: Ruben Undheim <ruben.undheim@gmail.com>
 Section: electronics
 Priority: optional
+Testsuite: autopkgtest
 Build-Depends: debhelper (>= 9),
                tcl-dev,
                libreadline-dev,
@@ -12,7 +13,7 @@ Build-Depends: debhelper (>= 9),
                libffi-dev,
                pkg-config,
                python3
-Standards-Version: 3.9.6
+Standards-Version: 3.9.7
 Vcs-Browser: https://anonscm.debian.org/cgit/debian-science/packages/yosys.git
 Vcs-Git: https://anonscm.debian.org/git/debian-science/packages/yosys.git
 Homepage: http://www.clifford.at/yosys
diff --git a/debian/tests/control b/debian/tests/control
new file mode 100644
index 00000000..94262d9f
--- /dev/null
+++ b/debian/tests/control
@@ -0,0 +1,2 @@
+Tests: ice
+Depends: @
diff --git a/debian/tests/design_ice.v b/debian/tests/design_ice.v
new file mode 100644
index 00000000..87dd1d32
--- /dev/null
+++ b/debian/tests/design_ice.v
@@ -0,0 +1,19 @@
+module design_ice(input ck, input I1, output O1);
+
+    reg ready = 0;
+    reg value;
+
+    always @(posedge ck) begin
+        if(ready) begin
+            value   <= I1;
+        end
+        else begin
+            ready   <= 1;
+        end
+
+    end
+
+
+    assign O1 = value;
+
+endmodule
diff --git a/debian/tests/ice b/debian/tests/ice
new file mode 100755
index 00000000..1643807b
--- /dev/null
+++ b/debian/tests/ice
@@ -0,0 +1,13 @@
+#!/bin/sh
+
+set -e
+
+rm -f /tmp/design_ice.blif
+
+yosys -p "synth_ice40 -blif /tmp/design_ice.blif" debian/tests/design_ice.v
+
+if [ -f /tmp/design_ice.blif ] ; then
+  exit 0
+else
+  exit 1
+fi
-- 
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