From 1ecaf1bb767834dc6a763549b63d9d4653c342d1 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Thu, 6 Mar 2014 12:15:17 +0100 Subject: Added techmap -max_iter option --- passes/techmap/techmap.cc | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/passes/techmap/techmap.cc b/passes/techmap/techmap.cc index f163c024..937f4131 100644 --- a/passes/techmap/techmap.cc +++ b/passes/techmap/techmap.cc @@ -464,6 +464,9 @@ struct TechmapPass : public Pass { log(" yosys data files are). this is mainly used internally when techmap\n"); log(" is called from other commands.\n"); log("\n"); + log(" -max_iter \n"); + log(" only run the specified number of iterations.\n"); + log("\n"); log(" -D , -I \n"); log(" this options are passed as-is to the verilog frontend for loading the\n"); log(" map file. Note that the verilog frontend is also called with the\n"); @@ -542,6 +545,7 @@ struct TechmapPass : public Pass { std::vector map_files; std::string verilog_frontend = "verilog -ignore_redef"; + int max_iter = -1; size_t argidx; for (argidx = 1; argidx < args.size(); argidx++) { @@ -553,6 +557,10 @@ struct TechmapPass : public Pass { map_files.push_back(get_share_file_name(args[++argidx])); continue; } + if (args[argidx] == "-max_iter" && argidx+1 < args.size()) { + max_iter = atoi(args[++argidx].c_str()); + continue; + } if (args[argidx] == "-D" && argidx+1 < args.size()) { verilog_frontend += " -D " + args[++argidx]; continue; @@ -610,6 +618,8 @@ struct TechmapPass : public Pass { did_something = true; if (did_something) design->check(); + if (max_iter > 0 && --max_iter == 0) + break; } log("No more expansions possible.\n"); -- cgit v1.2.3