From aa0ab975b956e3b37c4d861fcf067475a28fd491 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Wed, 8 Apr 2015 12:13:53 +0200 Subject: Removed "techmap -share_map" (use "-map +/filename" instead) --- backends/btor/verilog2btor.sh | 2 +- passes/techmap/techmap.cc | 9 --------- 2 files changed, 1 insertion(+), 10 deletions(-) diff --git a/backends/btor/verilog2btor.sh b/backends/btor/verilog2btor.sh index ab45b490..abe31b9b 100755 --- a/backends/btor/verilog2btor.sh +++ b/backends/btor/verilog2btor.sh @@ -24,7 +24,7 @@ hierarchy -check; proc; opt; opt_const -mux_undef; opt; rename -hide;;; -#techmap -share_map pmux2mux.v;; +#techmap -map +/pmux2mux.v;; splice; opt; memory_dff -wr_only; memory_collect;; diff --git a/passes/techmap/techmap.cc b/passes/techmap/techmap.cc index ab748ed7..bc86571b 100644 --- a/passes/techmap/techmap.cc +++ b/passes/techmap/techmap.cc @@ -824,11 +824,6 @@ struct TechmapPass : public Pass { log(" -map %%\n"); log(" like -map above, but with an in-memory design instead of a file.\n"); log("\n"); - log(" -share_map filename\n"); - log(" like -map, but look for the file in the share directory (where the\n"); - log(" yosys data files are). this is mainly used internally when techmap\n"); - log(" is called from other commands.\n"); - log("\n"); log(" -extern\n"); log(" load the cell implementations as separate modules into the design\n"); log(" instead of inlining them.\n"); @@ -962,10 +957,6 @@ struct TechmapPass : public Pass { map_files.push_back(args[++argidx]); continue; } - if (args[argidx] == "-share_map" && argidx+1 < args.size()) { - map_files.push_back(proc_share_dirname() + args[++argidx]); - continue; - } if (args[argidx] == "-max_iter" && argidx+1 < args.size()) { max_iter = atoi(args[++argidx].c_str()); continue; -- cgit v1.2.3