From cad98bcd89cd9747f3ea9e35eed8d9bbedd64d7a Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Tue, 12 Aug 2014 10:37:47 +0200 Subject: Added multi-dim memory test (requires iverilog git head) --- tests/simple/memory.v | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/tests/simple/memory.v b/tests/simple/memory.v index 9fed1bf3..db06c56d 100644 --- a/tests/simple/memory.v +++ b/tests/simple/memory.v @@ -194,3 +194,14 @@ always @(posedge clk) begin end endmodule + +// ---------------------------------------------------------- + +module memtest08(input clk, input [3:0] a, b, c, output reg [3:0] y); + reg [3:0] mem [0:15] [0:15]; + always @(posedge clk) begin + y <= mem[a][b]; + mem[a][b] <= c; + end +endmodule + -- cgit v1.2.3