From f9946232adf887e5aa4a48c64f88eaa17e424009 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Sun, 27 Jul 2014 01:49:51 +0200 Subject: Refactoring: Renamed RTLIL::Module::wires to wires_ --- backends/edif/edif.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'backends/edif') diff --git a/backends/edif/edif.cc b/backends/edif/edif.cc index fc2f4a7e..e99d094f 100644 --- a/backends/edif/edif.cc +++ b/backends/edif/edif.cc @@ -255,7 +255,7 @@ struct EdifBackend : public Backend { fprintf(f, " (view VIEW_NETLIST\n"); fprintf(f, " (viewType NETLIST)\n"); fprintf(f, " (interface\n"); - for (auto &wire_it : module->wires) { + for (auto &wire_it : module->wires_) { RTLIL::Wire *wire = wire_it.second; if (wire->port_id == 0) continue; -- cgit v1.2.3