From 375c4dddc19c7029b82d9d4482f32938b7f6cd85 Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Wed, 29 Jan 2014 00:59:28 +0100
Subject: Added read_verilog -icells option

---
 frontends/ast/genrtlil.cc | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'frontends/ast/genrtlil.cc')

diff --git a/frontends/ast/genrtlil.cc b/frontends/ast/genrtlil.cc
index 83a5c750..6001e278 100644
--- a/frontends/ast/genrtlil.cc
+++ b/frontends/ast/genrtlil.cc
@@ -1334,6 +1334,8 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint, bool sign_hint)
 				AstNode *child = *it;
 				if (child->type == AST_CELLTYPE) {
 					cell->type = child->str;
+					if (flag_icells && cell->type.substr(0, 2) == "\\$")
+						cell->type = cell->type.substr(1);
 					continue;
 				}
 				if (child->type == AST_PARASET) {
-- 
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