From a6750b375301f2c2ebb51a2496cdf2c820b2546b Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Mon, 3 Feb 2014 13:01:45 +0100 Subject: Added TRANSPARENT parameter to $memrd (and RD_TRANSPARENT to $mem) --- frontends/ast/genrtlil.cc | 1 + 1 file changed, 1 insertion(+) (limited to 'frontends/ast') diff --git a/frontends/ast/genrtlil.cc b/frontends/ast/genrtlil.cc index 99d8566d..591d027c 100644 --- a/frontends/ast/genrtlil.cc +++ b/frontends/ast/genrtlil.cc @@ -1245,6 +1245,7 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint, bool sign_hint) cell->parameters["\\CLK_ENABLE"] = RTLIL::Const(0); cell->parameters["\\CLK_POLARITY"] = RTLIL::Const(0); + cell->parameters["\\TRANSPARENT"] = RTLIL::Const(0); return RTLIL::SigSpec(wire); } -- cgit v1.2.3