From ecc30255ba70910777a4586f5bd6abc818073293 Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Fri, 27 Dec 2013 13:50:08 +0100
Subject: Added proper === and !== support in constant expressions

---
 frontends/ast/ast.cc      |  4 ++++
 frontends/ast/ast.h       |  2 ++
 frontends/ast/genrtlil.cc | 16 ++++++++++------
 frontends/ast/simplify.cc | 16 ++++++++++------
 4 files changed, 26 insertions(+), 12 deletions(-)

(limited to 'frontends/ast')

diff --git a/frontends/ast/ast.cc b/frontends/ast/ast.cc
index 0e65f1cb..20158488 100644
--- a/frontends/ast/ast.cc
+++ b/frontends/ast/ast.cc
@@ -103,6 +103,8 @@ std::string AST::type2str(AstNodeType type)
 	X(AST_LE)
 	X(AST_EQ)
 	X(AST_NE)
+	X(AST_EQX)
+	X(AST_NEX)
 	X(AST_GE)
 	X(AST_GT)
 	X(AST_ADD)
@@ -539,6 +541,8 @@ void AstNode::dumpVlog(FILE *f, std::string indent)
 	if (0) { case AST_LE:           txt = "<=";  }
 	if (0) { case AST_EQ:           txt = "==";  }
 	if (0) { case AST_NE:           txt = "!=";  }
+	if (0) { case AST_EQX:          txt = "===";  }
+	if (0) { case AST_NEX:          txt = "!==";  }
 	if (0) { case AST_GE:           txt = ">=";  }
 	if (0) { case AST_GT:           txt = ">";   }
 	if (0) { case AST_ADD:          txt = "+";   }
diff --git a/frontends/ast/ast.h b/frontends/ast/ast.h
index f8e27927..22853d0f 100644
--- a/frontends/ast/ast.h
+++ b/frontends/ast/ast.h
@@ -82,6 +82,8 @@ namespace AST
 		AST_LE,
 		AST_EQ,
 		AST_NE,
+		AST_EQX,
+		AST_NEX,
 		AST_GE,
 		AST_GT,
 		AST_ADD,
diff --git a/frontends/ast/genrtlil.cc b/frontends/ast/genrtlil.cc
index 269752df..36ca1432 100644
--- a/frontends/ast/genrtlil.cc
+++ b/frontends/ast/genrtlil.cc
@@ -728,6 +728,8 @@ void AstNode::detectSignWidthWorker(int &width_hint, bool &sign_hint)
 	case AST_LE:
 	case AST_EQ:
 	case AST_NE:
+	case AST_EQX:
+	case AST_NEX:
 	case AST_GE:
 	case AST_GT:
 		width_hint = std::max(width_hint, 1);
@@ -1113,12 +1115,14 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint, bool sign_hint)
 		}
 
 	// generate cells for binary operations: $lt, $le, $eq, $ne, $ge, $gt
-	if (0) { case AST_LT: type_name = "$lt"; }
-	if (0) { case AST_LE: type_name = "$le"; }
-	if (0) { case AST_EQ: type_name = "$eq"; }
-	if (0) { case AST_NE: type_name = "$ne"; }
-	if (0) { case AST_GE: type_name = "$ge"; }
-	if (0) { case AST_GT: type_name = "$gt"; }
+	if (0) { case AST_LT:  type_name = "$lt"; }
+	if (0) { case AST_LE:  type_name = "$le"; }
+	if (0) { case AST_EQ:  type_name = "$eq"; }
+	if (0) { case AST_NE:  type_name = "$ne"; }
+	if (0) { case AST_EQX: type_name = "$eq"; }
+	if (0) { case AST_NEX: type_name = "$ne"; }
+	if (0) { case AST_GE:  type_name = "$ge"; }
+	if (0) { case AST_GT:  type_name = "$gt"; }
 		{
 			int width = std::max(width_hint, 1);
 			width_hint = -1, sign_hint = true;
diff --git a/frontends/ast/simplify.cc b/frontends/ast/simplify.cc
index f6df0c17..982d1ae3 100644
--- a/frontends/ast/simplify.cc
+++ b/frontends/ast/simplify.cc
@@ -299,6 +299,8 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage,
 	case AST_LE:
 	case AST_EQ:
 	case AST_NE:
+	case AST_EQX:
+	case AST_NEX:
 	case AST_GE:
 	case AST_GT:
 		width_hint = -1;
@@ -1258,12 +1260,14 @@ skip_dynamic_range_lvalue_expansion:;
 				newNode = mkconst_bits(y.bits, sign_hint);
 			}
 			break;
-		if (0) { case AST_LT: const_func = RTLIL::const_lt; }
-		if (0) { case AST_LE: const_func = RTLIL::const_le; }
-		if (0) { case AST_EQ: const_func = RTLIL::const_eq; }
-		if (0) { case AST_NE: const_func = RTLIL::const_ne; }
-		if (0) { case AST_GE: const_func = RTLIL::const_ge; }
-		if (0) { case AST_GT: const_func = RTLIL::const_gt; }
+		if (0) { case AST_LT:  const_func = RTLIL::const_lt; }
+		if (0) { case AST_LE:  const_func = RTLIL::const_le; }
+		if (0) { case AST_EQ:  const_func = RTLIL::const_eq; }
+		if (0) { case AST_NE:  const_func = RTLIL::const_ne; }
+		if (0) { case AST_EQX: const_func = RTLIL::const_eqx; }
+		if (0) { case AST_NEX: const_func = RTLIL::const_nex; }
+		if (0) { case AST_GE:  const_func = RTLIL::const_ge; }
+		if (0) { case AST_GT:  const_func = RTLIL::const_gt; }
 			if (children[0]->type == AST_CONSTANT && children[1]->type == AST_CONSTANT) {
 				int cmp_width = std::max(children[0]->bits.size(), children[1]->bits.size());
 				bool cmp_signed = children[0]->is_signed && children[1]->is_signed;
-- 
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