From c7afbd9d8efcf3045d9e4244600ce8d8e0d40b6d Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Fri, 15 Aug 2014 01:53:22 +0200 Subject: Fixed bug in "read_verilog -ignore_redef" --- frontends/ast/ast.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'frontends') diff --git a/frontends/ast/ast.cc b/frontends/ast/ast.cc index 551859eb..ec9616be 100644 --- a/frontends/ast/ast.cc +++ b/frontends/ast/ast.cc @@ -947,7 +947,7 @@ void AST::process(RTLIL::Design *design, AstNode *ast, bool dump_ast1, bool dump if (!ignore_redef) log_error("Re-definition of module `%s' at %s:%d!\n", (*it)->str.c_str(), (*it)->filename.c_str(), (*it)->linenum); - log_error("Ignoring re-definition of module `%s' at %s:%d!\n", + log("Ignoring re-definition of module `%s' at %s:%d!\n", (*it)->str.c_str(), (*it)->filename.c_str(), (*it)->linenum); continue; } -- cgit v1.2.3