From a1c62b79d5d554be86b4b9bd53d72704b045acde Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Sun, 5 Apr 2015 18:04:19 +0200 Subject: Avoid parameter values with size 0 ($mem cells) --- kernel/rtlil.cc | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'kernel/rtlil.cc') diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc index 6de5846f..2dff53b7 100644 --- a/kernel/rtlil.cc +++ b/kernel/rtlil.cc @@ -918,11 +918,11 @@ namespace { param("\\SIZE"); param("\\OFFSET"); param("\\INIT"); - param_bits("\\RD_CLK_ENABLE", param("\\RD_PORTS")); - param_bits("\\RD_CLK_POLARITY", param("\\RD_PORTS")); - param_bits("\\RD_TRANSPARENT", param("\\RD_PORTS")); - param_bits("\\WR_CLK_ENABLE", param("\\WR_PORTS")); - param_bits("\\WR_CLK_POLARITY", param("\\WR_PORTS")); + param_bits("\\RD_CLK_ENABLE", std::max(1, param("\\RD_PORTS"))); + param_bits("\\RD_CLK_POLARITY", std::max(1, param("\\RD_PORTS"))); + param_bits("\\RD_TRANSPARENT", std::max(1, param("\\RD_PORTS"))); + param_bits("\\WR_CLK_ENABLE", std::max(1, param("\\WR_PORTS"))); + param_bits("\\WR_CLK_POLARITY", std::max(1, param("\\WR_PORTS"))); port("\\RD_CLK", param("\\RD_PORTS")); port("\\RD_ADDR", param("\\RD_PORTS") * param("\\ABITS")); port("\\RD_DATA", param("\\RD_PORTS") * param("\\WIDTH")); -- cgit v1.2.3