From 03c96f9ce7120adf1c9bab93485a3b4bf6493ae9 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Tue, 29 Jul 2014 16:06:27 +0200 Subject: Added "techmap -map %{design-name}" --- kernel/rtlil.cc | 5 +++++ kernel/rtlil.h | 5 +++++ 2 files changed, 10 insertions(+) (limited to 'kernel') diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc index 83bbd7b1..f864d88c 100644 --- a/kernel/rtlil.cc +++ b/kernel/rtlil.cc @@ -219,6 +219,11 @@ void RTLIL::Selection::optimize(RTLIL::Design *design) } } +RTLIL::Design::Design() +{ + refcount_modules_ = 0; +} + RTLIL::Design::~Design() { for (auto it = modules_.begin(); it != modules_.end(); it++) diff --git a/kernel/rtlil.h b/kernel/rtlil.h index e8d05e7e..1f25542f 100644 --- a/kernel/rtlil.h +++ b/kernel/rtlil.h @@ -352,11 +352,16 @@ struct RTLIL::Design std::map selection_vars; std::string selected_active_module; + Design(); ~Design(); RTLIL::ObjRange modules(); RTLIL::Module *module(RTLIL::IdString name); + bool has(RTLIL::IdString id) const { + return modules_.count(id) != 0; + } + void add(RTLIL::Module *module); RTLIL::Module *addModule(RTLIL::IdString name); void remove(RTLIL::Module *module); -- cgit v1.2.3