From 122b3c067b87464bd362ccce96fdeb84fa476653 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Fri, 27 Dec 2013 18:11:05 +0100 Subject: Fixed sat handling of $eqx and $nex with unequal port widths --- kernel/satgen.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'kernel') diff --git a/kernel/satgen.h b/kernel/satgen.h index 67312f44..05f3310c 100644 --- a/kernel/satgen.h +++ b/kernel/satgen.h @@ -462,6 +462,7 @@ struct SatGen if (model_undef && (cell->type == "$eqx" || cell->type == "$nex")) { std::vector undef_a = importUndefSigSpec(cell->connections.at("\\A"), timestep); std::vector undef_b = importUndefSigSpec(cell->connections.at("\\B"), timestep); + extendSignalWidth(undef_a, undef_b, cell, true); a = ez->vec_or(a, undef_a); b = ez->vec_or(b, undef_b); } @@ -486,6 +487,7 @@ struct SatGen std::vector undef_a = importUndefSigSpec(cell->connections.at("\\A"), timestep); std::vector undef_b = importUndefSigSpec(cell->connections.at("\\B"), timestep); std::vector undef_y = importUndefSigSpec(cell->connections.at("\\Y"), timestep); + extendSignalWidth(undef_a, undef_b, cell, true); if (cell->type == "$eqx") yy.at(0) = ez->AND(yy.at(0), ez->vec_eq(undef_a, undef_b)); -- cgit v1.2.3