From d4680fd5a02bf09872080096ab106abbb6f7e519 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Sun, 3 Mar 2013 20:53:24 +0100 Subject: Added design->select() api and use it in extract pass --- kernel/rtlil.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'kernel') diff --git a/kernel/rtlil.h b/kernel/rtlil.h index b5338a33..a0d7a1a3 100644 --- a/kernel/rtlil.h +++ b/kernel/rtlil.h @@ -212,6 +212,13 @@ struct RTLIL::Design { template bool selected(T1 *module, T2 *member) { return selected_member(module->name, member->name); } + template void select(T1 *module, T2 *member) { + if (selection_stack.size() > 0) { + RTLIL::Selection &sel = selection_stack.back(); + if (!sel.full_selection && sel.selected_modules.count(module->name) == 0) + sel.selected_members[module->name].insert(member->name); + } + } }; struct RTLIL::Module { -- cgit v1.2.3