From 84bf862f7c58c2b69babf043ff5032f924a3ee4d Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Fri, 14 Aug 2015 10:56:05 +0200
Subject: Spell check (by Larry Doolittle)

---
 manual/CHAPTER_Techmap.tex | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'manual/CHAPTER_Techmap.tex')

diff --git a/manual/CHAPTER_Techmap.tex b/manual/CHAPTER_Techmap.tex
index e5c7456c..13aa8e5a 100644
--- a/manual/CHAPTER_Techmap.tex
+++ b/manual/CHAPTER_Techmap.tex
@@ -5,7 +5,7 @@
 Previous chapters outlined how HDL code is transformed into an RTL netlist. The
 RTL netlist is still based on abstract coarse-grain cell types like arbitrary
 width adders and even multipliers. This chapter covers how an RTL netlist is
-transformed into a functionally equivialent netlist utililizing the cell types
+transformed into a functionally equivalent netlist utilizing the cell types
 available in the target architecture.
 
 Technology mapping is often performed in two phases. In the first phase RTL cells
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