From 79edcd4318590974ef49b2d5f561382eea3454bf Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Fri, 21 Feb 2014 14:59:59 +0100
Subject: Progress in presentation

---
 manual/PRESENTATION_ExAdv/macc_xilinx_swap_map.v   |  4 +---
 manual/PRESENTATION_ExAdv/macc_xilinx_test.ys      |  2 +-
 manual/PRESENTATION_ExAdv/macc_xilinx_unwrap_map.v |  6 ++----
 manual/PRESENTATION_ExAdv/macc_xilinx_wrap_map.v   | 12 +++++-------
 manual/PRESENTATION_ExAdv/macc_xilinx_xmap.v       |  4 ++--
 5 files changed, 11 insertions(+), 17 deletions(-)

(limited to 'manual/PRESENTATION_ExAdv')

diff --git a/manual/PRESENTATION_ExAdv/macc_xilinx_swap_map.v b/manual/PRESENTATION_ExAdv/macc_xilinx_swap_map.v
index 1f4867d1..e3696722 100644
--- a/manual/PRESENTATION_ExAdv/macc_xilinx_swap_map.v
+++ b/manual/PRESENTATION_ExAdv/macc_xilinx_swap_map.v
@@ -1,4 +1,3 @@
-
 (* techmap_celltype = "$mul" *)
 module mul_swap_ports (A, B, Y);
 
@@ -12,7 +11,7 @@ input [A_WIDTH-1:0] A;
 input [B_WIDTH-1:0] B;
 output [Y_WIDTH-1:0] Y;
 
-wire _TECHMAP_FAIL_ = A_WIDTH >= B_WIDTH;
+wire _TECHMAP_FAIL_ = A_WIDTH <= B_WIDTH;
 
 \$mul #(
 	.A_SIGNED(B_SIGNED),
@@ -27,4 +26,3 @@ wire _TECHMAP_FAIL_ = A_WIDTH >= B_WIDTH;
 );
 
 endmodule
-
diff --git a/manual/PRESENTATION_ExAdv/macc_xilinx_test.ys b/manual/PRESENTATION_ExAdv/macc_xilinx_test.ys
index 3f7893fa..f3e8af4f 100644
--- a/manual/PRESENTATION_ExAdv/macc_xilinx_test.ys
+++ b/manual/PRESENTATION_ExAdv/macc_xilinx_test.ys
@@ -38,6 +38,6 @@ techmap -map macc_xilinx_unwrap_map.v;;
 show -prefix macc_xilinx_test1e -format pdf -notitle test1
 show -prefix macc_xilinx_test2e -format pdf -notitle test2
 
-design -load
+design -load __macc_xilinx_xmap
 show -prefix macc_xilinx_xmap -format pdf -notitle
 
diff --git a/manual/PRESENTATION_ExAdv/macc_xilinx_unwrap_map.v b/manual/PRESENTATION_ExAdv/macc_xilinx_unwrap_map.v
index a80538d5..9dfaef13 100644
--- a/manual/PRESENTATION_ExAdv/macc_xilinx_unwrap_map.v
+++ b/manual/PRESENTATION_ExAdv/macc_xilinx_unwrap_map.v
@@ -1,4 +1,3 @@
-
 module \$__mul_wrapper (A, B, Y);
 
 parameter A_SIGNED = 0;
@@ -7,8 +6,8 @@ parameter A_WIDTH = 1;
 parameter B_WIDTH = 1;
 parameter Y_WIDTH = 1;
 
-input [24:0] A;
-input [17:0] B;
+input [17:0] A;
+input [24:0] B;
 output [47:0] Y;
 
 wire [A_WIDTH-1:0] A_ORIG = A;
@@ -60,4 +59,3 @@ assign Y = Y_ORIG;
 );
 
 endmodule
-
diff --git a/manual/PRESENTATION_ExAdv/macc_xilinx_wrap_map.v b/manual/PRESENTATION_ExAdv/macc_xilinx_wrap_map.v
index d1ded295..f23f6c02 100644
--- a/manual/PRESENTATION_ExAdv/macc_xilinx_wrap_map.v
+++ b/manual/PRESENTATION_ExAdv/macc_xilinx_wrap_map.v
@@ -1,4 +1,3 @@
-
 (* techmap_celltype = "$mul" *)
 module mul_wrap (A, B, Y);
 
@@ -12,8 +11,8 @@ input [A_WIDTH-1:0] A;
 input [B_WIDTH-1:0] B;
 output [Y_WIDTH-1:0] Y;
 
-wire [24:0] A_25 = A;
-wire [17:0] B_18 = B;
+wire [17:0] A_18 = A;
+wire [24:0] B_25 = B;
 wire [47:0] Y_48;
 assign Y = Y_48;
 
@@ -26,7 +25,7 @@ initial begin
 		_TECHMAP_FAIL_ <= 1;
 	if (A_WIDTH < 4 || B_WIDTH < 4)
 		_TECHMAP_FAIL_ <= 1;
-	if (A_WIDTH > 25 || B_WIDTH > 18)
+	if (A_WIDTH > 18 || B_WIDTH > 25)
 		_TECHMAP_FAIL_ <= 1;
 	if (A_WIDTH*B_WIDTH < 100)
 		_TECHMAP_FAIL_ <= 1;
@@ -39,8 +38,8 @@ end
 	.B_WIDTH(B_WIDTH),
 	.Y_WIDTH(Y_WIDTH)
 ) _TECHMAP_REPLACE_ (
-	.A(A_25),
-	.B(B_18),
+	.A(A_18),
+	.B(B_25),
 	.Y(Y_48)
 );
 
@@ -88,4 +87,3 @@ end
 );
 
 endmodule
-
diff --git a/manual/PRESENTATION_ExAdv/macc_xilinx_xmap.v b/manual/PRESENTATION_ExAdv/macc_xilinx_xmap.v
index 15bd04ed..06372f5a 100644
--- a/manual/PRESENTATION_ExAdv/macc_xilinx_xmap.v
+++ b/manual/PRESENTATION_ExAdv/macc_xilinx_xmap.v
@@ -1,7 +1,7 @@
 module DSP48_MACC (a, b, c, y);
 
-input [24:0] a;
-input [17:0] b;
+input [17:0] a;
+input [24:0] b;
 input [47:0] c;
 output [47:0] y;
 
-- 
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