From 1af1cebb64b5d8d3f0a66d01d05762a15b3bc0db Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Tue, 20 Aug 2013 09:46:05 +0200 Subject: Minor fixes in abc build instructions and abc pass --- passes/abc/abc.cc | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'passes/abc') diff --git a/passes/abc/abc.cc b/passes/abc/abc.cc index c1f9eb2d..41104ee9 100644 --- a/passes/abc/abc.cc +++ b/passes/abc/abc.cc @@ -457,21 +457,21 @@ static void abc_module(RTLIL::Design *design, RTLIL::Module *current_module, std int buffer_pos = 0; if (!liberty_file.empty()) buffer_pos += snprintf(buffer+buffer_pos, 1024-buffer_pos, - "%s -c 'read_verilog %s/input.v; read_liberty %s; map; ", + "%s -s -c 'read_verilog %s/input.v; read_liberty %s; map; ", exe_file.c_str(), tempdir_name, liberty_file.c_str()); else if (!script_file.empty()) buffer_pos += snprintf(buffer+buffer_pos, 1024-buffer_pos, - "%s -c 'read_verilog %s/input.v; source %s; ", + "%s -s -c 'read_verilog %s/input.v; source %s; ", exe_file.c_str(), tempdir_name, script_file.c_str()); else if (lut_mode) buffer_pos += snprintf(buffer+buffer_pos, 1024-buffer_pos, - "%s -c 'read_verilog %s/input.v; read_lut %s/lutdefs.txt; if; ", + "%s -s -c 'read_verilog %s/input.v; read_lut %s/lutdefs.txt; if; ", exe_file.c_str(), tempdir_name, tempdir_name); else buffer_pos += snprintf(buffer+buffer_pos, 1024-buffer_pos, - "%s -c 'read_verilog %s/input.v; read_library %s/stdcells.genlib; map; ", + "%s -s -c 'read_verilog %s/input.v; read_library %s/stdcells.genlib; map; ", exe_file.c_str(), tempdir_name, tempdir_name); if (lut_mode) buffer_pos += snprintf(buffer+buffer_pos, 1024-buffer_pos, "write_blif %s/output.blif' 2>&1", tempdir_name); -- cgit v1.2.3