From 4b4048bc5feba1ab05c7a63f12c0a17879cb7e04 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Tue, 22 Jul 2014 20:15:14 +0200 Subject: SigSpec refactoring: using the accessor functions everywhere --- passes/hierarchy/hierarchy.cc | 4 ++-- passes/hierarchy/submod.cc | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'passes/hierarchy') diff --git a/passes/hierarchy/hierarchy.cc b/passes/hierarchy/hierarchy.cc index 5d9dc18a..90f377e0 100644 --- a/passes/hierarchy/hierarchy.cc +++ b/passes/hierarchy/hierarchy.cc @@ -61,7 +61,7 @@ static void generate(RTLIL::Design *design, const std::vector &cell for (auto &conn : i2.second->connections) { if (conn.first[0] != '$') portnames.insert(conn.first); - portwidths[conn.first] = std::max(portwidths[conn.first], conn.second.__width); + portwidths[conn.first] = std::max(portwidths[conn.first], conn.second.size()); } for (auto ¶ : i2.second->parameters) parameters.insert(para.first); @@ -220,7 +220,7 @@ static bool expand_module(RTLIL::Design *design, RTLIL::Module *module, bool fla RTLIL::Module *mod = design->modules[cell->type]; for (auto &conn : cell->connections) { - int conn_size = conn.second.__width; + int conn_size = conn.second.size(); std::string portname = conn.first; if (portname.substr(0, 1) == "$") { int port_id = atoi(portname.substr(1).c_str()); diff --git a/passes/hierarchy/submod.cc b/passes/hierarchy/submod.cc index f8f2b596..fa8043c8 100644 --- a/passes/hierarchy/submod.cc +++ b/passes/hierarchy/submod.cc @@ -67,7 +67,7 @@ struct SubmodWorker void flag_signal(RTLIL::SigSpec &sig, bool create, bool set_int_driven, bool set_int_used, bool set_ext_driven, bool set_ext_used) { - for (auto &c : sig.__chunks) + for (auto &c : sig.chunks()) if (c.wire != NULL) flag_wire(c.wire, create, set_int_driven, set_int_used, set_ext_driven, set_ext_used); } @@ -164,7 +164,7 @@ struct SubmodWorker for (RTLIL::Cell *cell : submod.cells) { RTLIL::Cell *new_cell = new RTLIL::Cell(*cell); for (auto &conn : new_cell->connections) - for (auto &c : conn.second.__chunks) + for (auto &c : conn.second.chunks()) if (c.wire != NULL) { assert(wire_flags.count(c.wire) > 0); c.wire = wire_flags[c.wire].new_wire; -- cgit v1.2.3