From 081e1a49f81c298a5c30c4b51241d50ce64f185e Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Tue, 6 Jan 2015 14:26:51 +0100 Subject: Towards Xilinx bram support --- passes/memory/memory_bram.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'passes') diff --git a/passes/memory/memory_bram.cc b/passes/memory/memory_bram.cc index e7a42f26..fd5db188 100644 --- a/passes/memory/memory_bram.cc +++ b/passes/memory/memory_bram.cc @@ -356,7 +356,7 @@ bool replace_cell(Cell *cell, const rules_t::bram_t &bram, const rules_t::match_ for (int i = 0; i < fillbits; i++) { for (int j = 0; j < wr_ports; j++) { new_wr_en[j].append(fillbit); - new_wr_data[j].append(State::Sx); + new_wr_data[j].append(State::S0); } for (int j = 0; j < rd_ports; j++) new_rd_data[j].append(State::Sx); -- cgit v1.2.3