From 7f52c18a22e85b0a2db17511b4617534395aacfb Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Sat, 8 Feb 2014 19:13:19 +0100 Subject: Fixed bug in collecting of RD_TRANSPARENT parameter in memory_collect --- passes/memory/memory_collect.cc | 1 + 1 file changed, 1 insertion(+) (limited to 'passes') diff --git a/passes/memory/memory_collect.cc b/passes/memory/memory_collect.cc index 40504d78..6fe5e162 100644 --- a/passes/memory/memory_collect.cc +++ b/passes/memory/memory_collect.cc @@ -160,6 +160,7 @@ static void handle_memory(RTLIL::Module *module, RTLIL::Memory *memory) sig_rd_clk_enable.optimize(); sig_rd_clk_polarity.optimize(); + sig_rd_transparent.optimize(); assert(sig_rd_clk.width == rd_ports); assert(sig_rd_clk_enable.width == rd_ports && sig_rd_clk_enable.is_fully_const()); -- cgit v1.2.3