From 4aa9fbbf3fe095220895dd2508ac6118b7382493 Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Wed, 24 Dec 2014 10:49:24 +0100
Subject: Improvements in simplemap api, added $ne $nex $eq $eqx support

---
 techlibs/common/techmap.v | 54 +++++------------------------------------------
 1 file changed, 5 insertions(+), 49 deletions(-)

(limited to 'techlibs/common')

diff --git a/techlibs/common/techmap.v b/techlibs/common/techmap.v
index 7b552856..e0ecf0c4 100644
--- a/techlibs/common/techmap.v
+++ b/techlibs/common/techmap.v
@@ -53,6 +53,11 @@ endmodule
 module _90_simplemap_logic_ops;
 endmodule
 
+(* techmap_simplemap *)
+(* techmap_celltype = "$eq $eqx $ne $nex" *)
+module _90_simplemap_compare_ops;
+endmodule
+
 (* techmap_simplemap *)
 (* techmap_celltype = "$pos $slice $concat $mux" *)
 module _90_simplemap_various;
@@ -406,55 +411,6 @@ module _90_pow (A, B, Y);
 endmodule
 
 
-// --------------------------------------------------------
-// Equal and Not-Equal
-// --------------------------------------------------------
-
-(* techmap_celltype = "$eq $eqx" *)
-module _90_eq_eqx (A, B, Y);
-	parameter A_SIGNED = 0;
-	parameter B_SIGNED = 0;
-	parameter A_WIDTH = 1;
-	parameter B_WIDTH = 1;
-	parameter Y_WIDTH = 1;
-
-	localparam WIDTH = A_WIDTH > B_WIDTH ? A_WIDTH : B_WIDTH;
-
-	input [A_WIDTH-1:0] A;
-	input [B_WIDTH-1:0] B;
-	output [Y_WIDTH-1:0] Y;
-
-	wire carry, carry_sign;
-	wire [WIDTH-1:0] A_buf, B_buf;
-	\$pos #(.A_SIGNED(A_SIGNED), .A_WIDTH(A_WIDTH), .Y_WIDTH(WIDTH)) A_conv (.A(A), .Y(A_buf));
-	\$pos #(.A_SIGNED(B_SIGNED), .A_WIDTH(B_WIDTH), .Y_WIDTH(WIDTH)) B_conv (.A(B), .Y(B_buf));
-
-	assign Y = ~|(A_buf ^ B_buf);
-endmodule
-
-(* techmap_celltype = "$ne $nex" *)
-module _90_ne_nex (A, B, Y);
-	parameter A_SIGNED = 0;
-	parameter B_SIGNED = 0;
-	parameter A_WIDTH = 1;
-	parameter B_WIDTH = 1;
-	parameter Y_WIDTH = 1;
-
-	localparam WIDTH = A_WIDTH > B_WIDTH ? A_WIDTH : B_WIDTH;
-
-	input [A_WIDTH-1:0] A;
-	input [B_WIDTH-1:0] B;
-	output [Y_WIDTH-1:0] Y;
-
-	wire carry, carry_sign;
-	wire [WIDTH-1:0] A_buf, B_buf;
-	\$pos #(.A_SIGNED(A_SIGNED), .A_WIDTH(A_WIDTH), .Y_WIDTH(WIDTH)) A_conv (.A(A), .Y(A_buf));
-	\$pos #(.A_SIGNED(B_SIGNED), .A_WIDTH(B_WIDTH), .Y_WIDTH(WIDTH)) B_conv (.A(B), .Y(B_buf));
-
-	assign Y = |(A_buf ^ B_buf);
-endmodule
-
-
 // --------------------------------------------------------
 // Parallel Multiplexers
 // --------------------------------------------------------
-- 
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