From 706631225e9ef0d2954c4bef51aaa2817e0f5e86 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Sun, 5 Apr 2015 09:45:14 +0200 Subject: Added $_MUX4_, $_MUX8_, and $_MUX16_ cell types --- techlibs/common/simcells.v | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) (limited to 'techlibs/common') diff --git a/techlibs/common/simcells.v b/techlibs/common/simcells.v index eb62d783..d85cf5ad 100644 --- a/techlibs/common/simcells.v +++ b/techlibs/common/simcells.v @@ -79,6 +79,35 @@ output Y; assign Y = S ? B : A; endmodule +module \$_MUX4_ (A, B, C, D, S, T, Y); +input A, B, C, D, S, T; +output Y; +assign Y = T ? (S ? D : C) : + (S ? B : A); +endmodule + +module \$_MUX8_ (A, B, C, D, E, F, G, H, S, T, U, Y); +input A, B, C, D, E, F, G, H, S, T, U; +output Y; +assign Y = U ? T ? (S ? H : G) : + (S ? F : E) : + T ? (S ? D : C) : + (S ? B : A); +endmodule + +module \$_MUX16_ (A, B, C, D, E, F, G, H, I, J, K, L, M, N, O, P, S, T, U, V, Y); +input A, B, C, D, E, F, G, H, I, J, K, L, M, N, O, P, S, T, U, V; +output Y; +assign Y = V ? U ? T ? (S ? P : O) : + (S ? N : M) : + T ? (S ? L : K) : + (S ? J : I) : + U ? T ? (S ? H : G) : + (S ? F : E) : + T ? (S ? D : C) : + (S ? B : A); +endmodule + module \$_AOI3_ (A, B, C, Y); input A, B, C; output Y; -- cgit v1.2.3