From 8406e7f7b6cb8e79f7df02c2c616073a51c1ea9e Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Thu, 6 Mar 2014 12:15:44 +0100 Subject: Strictly zero-extend unsigned A-inputs of shift operations in techmap --- techlibs/common/stdcells.v | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'techlibs/common') diff --git a/techlibs/common/stdcells.v b/techlibs/common/stdcells.v index a51dcb94..cddaf4c6 100644 --- a/techlibs/common/stdcells.v +++ b/techlibs/common/stdcells.v @@ -174,7 +174,7 @@ output [Y_WIDTH-1:0] Y; genvar i; generate wire [WIDTH*(B_WIDTH+1)-1:0] chain; - \$pos #( + \$bu0 #( .A_SIGNED(A_SIGNED), .A_WIDTH(A_WIDTH), .Y_WIDTH(WIDTH) @@ -233,7 +233,7 @@ output [Y_WIDTH-1:0] Y; genvar i; generate wire [WIDTH*(BB_WIDTH+1)-1:0] chain; - \$pos #( + \$bu0 #( .A_SIGNED(A_SIGNED), .A_WIDTH(A_WIDTH), .Y_WIDTH(WIDTH) @@ -292,7 +292,7 @@ output [Y_WIDTH-1:0] Y; genvar i; generate wire [WIDTH*(B_WIDTH+1)-1:0] chain; - \$pos #( + \$bu0 #( .A_SIGNED(A_SIGNED), .A_WIDTH(A_WIDTH), .Y_WIDTH(WIDTH) @@ -351,7 +351,7 @@ output [Y_WIDTH-1:0] Y; genvar i; generate wire [WIDTH*(BB_WIDTH+1)-1:0] chain; - \$pos #( + \$bu0 #( .A_SIGNED(A_SIGNED), .A_WIDTH(A_WIDTH), .Y_WIDTH(WIDTH) -- cgit v1.2.3