From 08c13f635cb59f701b51a14caf608c503b6eecb1 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Tue, 6 Jan 2015 23:54:33 +0100 Subject: Xilinx RAMB36/RAMB18 memory_bram support complete --- techlibs/xilinx/tests/bram1_tb.v | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'techlibs/xilinx/tests/bram1_tb.v') diff --git a/techlibs/xilinx/tests/bram1_tb.v b/techlibs/xilinx/tests/bram1_tb.v index ff0929da..6ed04d4a 100644 --- a/techlibs/xilinx/tests/bram1_tb.v +++ b/techlibs/xilinx/tests/bram1_tb.v @@ -21,7 +21,7 @@ module bram1_tb #( .RD_DATA(RD_DATA) ); - reg [63:0] xorshift64_state = 64'd88172645463325252; + reg [63:0] xorshift64_state = 64'd88172645463325252 ^ (ABITS << 24) ^ (DBITS << 16) ^ (TRANSP << 8); task xorshift64_next; begin -- cgit v1.2.3