From c329233f0de691d818cc8b1aff3dd23cebf38949 Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Tue, 26 May 2015 17:04:37 +0200
Subject: Added output args to synth_ice40

---
 techlibs/xilinx/synth_xilinx.cc | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'techlibs/xilinx')

diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc
index 0e2fdac7..8ef0fae1 100644
--- a/techlibs/xilinx/synth_xilinx.cc
+++ b/techlibs/xilinx/synth_xilinx.cc
@@ -110,8 +110,8 @@ struct SynthXilinxPass : public Pass {
 		log("        stat\n");
 		log("        check -noinit\n");
 		log("\n");
-		log("    edif:\n");
-		log("        write_edif synth.edif\n");
+		log("    edif:     (only if -edif)\n");
+		log("        write_edif <file-name>\n");
 		log("\n");
 	}
 	virtual void execute(std::vector<std::string> args, RTLIL::Design *design)
-- 
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