From 6fcbc79b5c53c85dfbf37eba6ef8d8b3f7f7b1c7 Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Wed, 6 Nov 2013 20:50:53 +0100
Subject: Improved width extension with regard to undef propagation

---
 techlibs/common/stdcells.v | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)

(limited to 'techlibs')

diff --git a/techlibs/common/stdcells.v b/techlibs/common/stdcells.v
index 4bd1d39a..d89b39b8 100644
--- a/techlibs/common/stdcells.v
+++ b/techlibs/common/stdcells.v
@@ -245,7 +245,7 @@ parameter A_WIDTH = 1;
 parameter Y_WIDTH = 1;
 
 input [A_WIDTH-1:0] A;
-output Y;
+output [Y_WIDTH-1:0] Y;
 
 wire [A_WIDTH-1:0] buffer;
 
@@ -274,7 +274,7 @@ parameter A_WIDTH = 1;
 parameter Y_WIDTH = 1;
 
 input [A_WIDTH-1:0] A;
-output Y;
+output [Y_WIDTH-1:0] Y;
 
 wire [A_WIDTH-1:0] buffer;
 
@@ -303,7 +303,7 @@ parameter A_WIDTH = 1;
 parameter Y_WIDTH = 1;
 
 input [A_WIDTH-1:0] A;
-output Y;
+output [Y_WIDTH-1:0] Y;
 
 wire [A_WIDTH-1:0] buffer;
 
@@ -333,7 +333,7 @@ parameter A_WIDTH = 1;
 parameter Y_WIDTH = 1;
 
 input [A_WIDTH-1:0] A;
-output Y;
+output [Y_WIDTH-1:0] Y;
 
 wire [A_WIDTH-1:0] buffer;
 
@@ -365,7 +365,7 @@ parameter A_WIDTH = 1;
 parameter Y_WIDTH = 1;
 
 input [A_WIDTH-1:0] A;
-output Y;
+output [Y_WIDTH-1:0] Y;
 
 wire [A_WIDTH-1:0] buffer;
 
@@ -699,7 +699,7 @@ parameter WIDTH = A_WIDTH > B_WIDTH ? A_WIDTH : B_WIDTH;
 
 input [A_WIDTH-1:0] A;
 input [B_WIDTH-1:0] B;
-output Y;
+output [Y_WIDTH-1:0] Y;
 
 wire carry, carry_sign;
 wire [WIDTH-1:0] A_buf, B_buf, Y_buf;
@@ -748,7 +748,7 @@ parameter WIDTH = A_WIDTH > B_WIDTH ? A_WIDTH : B_WIDTH;
 
 input [A_WIDTH-1:0] A;
 input [B_WIDTH-1:0] B;
-output Y;
+output [Y_WIDTH-1:0] Y;
 
 wire carry, carry_sign;
 wire [WIDTH-1:0] A_buf, B_buf, Y_buf;
@@ -797,7 +797,7 @@ parameter WIDTH = A_WIDTH > B_WIDTH ? A_WIDTH : B_WIDTH;
 
 input [A_WIDTH-1:0] A;
 input [B_WIDTH-1:0] B;
-output Y;
+output [Y_WIDTH-1:0] Y;
 
 wire carry, carry_sign;
 wire [WIDTH-1:0] A_buf, B_buf;
@@ -822,7 +822,7 @@ parameter WIDTH = A_WIDTH > B_WIDTH ? A_WIDTH : B_WIDTH;
 
 input [A_WIDTH-1:0] A;
 input [B_WIDTH-1:0] B;
-output Y;
+output [Y_WIDTH-1:0] Y;
 
 wire carry, carry_sign;
 wire [WIDTH-1:0] A_buf, B_buf;
@@ -845,7 +845,7 @@ parameter Y_WIDTH = 1;
 
 input [A_WIDTH-1:0] A;
 input [B_WIDTH-1:0] B;
-output Y;
+output [Y_WIDTH-1:0] Y;
 
 \$le #(
 	.A_SIGNED(B_SIGNED),
@@ -872,7 +872,7 @@ parameter Y_WIDTH = 1;
 
 input [A_WIDTH-1:0] A;
 input [B_WIDTH-1:0] B;
-output Y;
+output [Y_WIDTH-1:0] Y;
 
 \$lt #(
 	.A_SIGNED(B_SIGNED),
-- 
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