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In this directory contains an example for generating a spice output using two
different spice modes, normal analog transient simulation and event-driven
digital simulation as supported by ngspice xspice sub-module.
Each test bench can be run separately by either running:
- testbench.sh, to start analog simulation or
- testbench_digital.sh for mixed-signal digital simulation.
The later case also includes pure verilog simulation using the iverilog
and gtkwave for comparison.
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