blob: ba365fabf8edb55fc9fa73bfad8011bb36d92910 (
plain)
1
2
3
4
5
6
|
Source of the files:
http://www.asic-world.com/examples/verilog/lfsr.html
Run first: runme_presynth
Generate output netlist with run_max10 or run_cycloneiv
Then, check with: runme_postsynth
|