tests/asicworld/code_verilog_tutorial_escape_id.v


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// There must be white space after the
// string which uses escape character
module \1dff (
q,      // Q output
\q~ ,   // Q_out output
d,      // D input
cl$k,   // CLOCK input
\reset* // Reset input
);

input d, cl$k, \reset* ;
output q, \q~ ;  

endmodule