tests/hana/test_simulation_always_20_test.v


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module NonBlockingEx(clk, merge, er, xmit, fddi, claim);
input clk, merge, er, xmit, fddi;
output reg claim;
reg fcr;

always @(posedge clk)
begin
    fcr <= er | xmit;

	if(merge)
	    claim <= fcr & fddi;
	else
	    claim <= fddi;
end
endmodule