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-rw-r--r--Makefile4
-rw-r--r--VERSION2
-rw-r--r--base/flatten.c2
-rw-r--r--base/netcmp.c589
-rw-r--r--base/netcmp.h6
-rw-r--r--base/netfile.c150
-rw-r--r--base/netfile.h1
-rw-r--r--base/netgen.c184
-rw-r--r--base/netgen.h6
-rw-r--r--base/objlist.h26
-rw-r--r--base/verilog.c615
-rw-r--r--doc/Makefile4
-rwxr-xr-xscripts/configure6
-rw-r--r--scripts/configure.in6
-rw-r--r--tcltk/netgen.tcl.in4
-rw-r--r--tcltk/tclnetgen.c219
-rw-r--r--tcltk/tmp.out4405
17 files changed, 5737 insertions, 492 deletions
diff --git a/Makefile b/Makefile
index 31fc673..82c01b5 100644
--- a/Makefile
+++ b/Makefile
@@ -60,11 +60,11 @@ install-real: install-dirs
(cd $$dir && ${MAKE} install); done
install-tcl-dirs:
- ${NETGENDIR}/scripts/mkdirs $(DESTDIR)${BINDIR} $(DESTDIR)${MANDIR} \
+ ${NETGENDIR}/scripts/mkdirs $(DESTDIR)${BINDIR} \
$(DESTDIR)${TCLDIR} $(DESTDIR)${PYDIR}
install-dirs:
- ${NETGENDIR}/scripts/mkdirs $(DESTDIR)${BINDIR} $(DESTDIR)${MANDIR}
+ ${NETGENDIR}/scripts/mkdirs $(DESTDIR)${BINDIR}
install-tcl: install-dirs
@echo --- installing executable to $(DESTDIR)${BINDIR}
diff --git a/VERSION b/VERSION
index 24ee572..d2fdc33 100644
--- a/VERSION
+++ b/VERSION
@@ -1 +1 @@
-1.5.107
+1.5.116
diff --git a/base/flatten.c b/base/flatten.c
index 83c9fea..2aedcf2 100644
--- a/base/flatten.c
+++ b/base/flatten.c
@@ -1391,7 +1391,7 @@ SurveyCell(struct nlist *tc, struct hashdict *compdict, int file1, int file2, in
/* */
/* If there is a mismatch between instances of low- */
/* level devices, determine if the mismatches can be */
-/* resolved by parallel/serial combining, according to */
+/* resolved by parallel/series combining, according to */
/* combination rules. */
/* */
/* Return the number of modifications made. */
diff --git a/base/netcmp.c b/base/netcmp.c
index 3d69fe6..69dc11b 100644
--- a/base/netcmp.c
+++ b/base/netcmp.c
@@ -500,7 +500,7 @@ void SummarizeDataStructures(void)
if (E->graph == Circuit1->file) cell1++;
else cell2++;
}
- Printf("Circuit 1 contains %d elements, Circuit 2 contains %d elements.",
+ Printf("Circuit 1 contains %d devices, Circuit 2 contains %d devices.",
cell1, cell2);
if (cell1 != cell2) Printf(" *** MISMATCH ***");
Printf("\n");
@@ -518,12 +518,12 @@ void SummarizeDataStructures(void)
if (N->elementlist == NULL) orphan2++;
}
}
- Printf("Circuit 1 contains %d nodes, Circuit 2 contains %d nodes.",
+ Printf("Circuit 1 contains %d nets, Circuit 2 contains %d nets.",
cell1, cell2);
if (cell1 != cell2) Printf(" *** MISMATCH ***");
Printf("\n");
if (orphan1 || orphan2) {
- Printf("Circuit 1 contains %d orphan nodes, Circuit 2 contains %d orphans.");
+ Printf("Circuit 1 contains %d orphan nets, Circuit 2 contains %d orphans.");
if (orphan1 != orphan2) Printf(" *** MISMATCH ***");
Printf("\n");
}
@@ -2076,7 +2076,7 @@ struct Node *CreateNodeList(char *name, short graph)
* in sequence to link up 'subelement' field of ElementList,
* then 'node' field of NodeList structures.
*
- * Return the number of devices combined by serial/parallel merging
+ * Return the number of devices combined by series/parallel merging
*/
int CreateLists(char *name, short graph)
@@ -2102,7 +2102,7 @@ int CreateLists(char *name, short graph)
return 0;
}
- /* Parallel and serial combinations. Run until networks of */
+ /* Parallel and series combinations. Run until networks of */
/* devices are resolved into a single device with the network */
/* represented by a number of property records. */
@@ -2112,19 +2112,21 @@ int CreateLists(char *name, short graph)
total += pcnt;
if (ppass > 0 && pcnt == 0) break;
for (spass = 0; ; spass++) {
- scnt = CombineSerial(name, graph);
+ scnt = CombineSeries(name, graph);
total += scnt;
if (scnt == 0) break;
}
if (spass == 0) break;
}
+ /* Uncomment this for series/parallel network diagnostics */
+ /* DumpNetworkAll(name, graph); */
Elements = CreateElementList(name, graph);
Nodes = CreateNodeList(name, graph);
if (LookupElementList == NULL) return total;
ElementScan = NULL;
- NListScan = NULL; /* just to stop the compiler from bitching */
+ NListScan = NULL;
for (ob = tp->cell; ob != NULL; ob = ob->next) {
if (ob->type == FIRSTPIN) {
if (ElementScan == NULL) ElementScan = Elements;
@@ -2221,7 +2223,7 @@ struct Node *CreateNodeList(char *name, short graph)
* in sequence to link up 'subelement' field of ElementList,
* then 'node' field of NodeList structures.
*
- * Return the number of devices combined by serial/parallel merging
+ * Return the number of devices combined by series/parallel merging
*/
int CreateLists(char *name, short graph)
@@ -2250,7 +2252,7 @@ int CreateLists(char *name, short graph)
ConnectAllNodes(name, graph);
- /* Parallel and serial combinations. Run until networks of */
+ /* Parallel and series combinations. Run until networks of */
/* devices are resolved into a single device with the network */
/* represented by a number of property records. */
@@ -2260,12 +2262,14 @@ int CreateLists(char *name, short graph)
total += pcnt;
if (ppass > 0 && pcnt == 0) break;
for (spass = 0; ; spass++) {
- scnt = CombineSerial(name, graph);
+ scnt = CombineSeries(name, graph);
total += scnt;
if (scnt == 0) break;
}
if (spass == 0) break;
}
+ /* Uncomment this for series/parallel network diagnostics */
+ /* DumpNetworkAll(name, graph); */
E = CreateElementList(name, graph);
N = CreateNodeList(name, graph);
@@ -3464,7 +3468,7 @@ void CreateTwoLists(char *name1, int file1, char *name2, int file2, int dolist)
}
if (modified > 0) {
- Printf("Circuit was modified by parallel/serial device merging.\n");
+ Printf("Circuit was modified by parallel/series device merging.\n");
Printf("New circuit summary:\n\n");
/* print preliminary statistics */
Printf("Contents of circuit 1: ");
@@ -3685,18 +3689,19 @@ int Iterate(void)
/*--------------------------------------------------------------*/
/* Combine properties of ob1 starting at property idx1 up to */
-/* property (idx1 + run1), where devices match critical serial */
+/* property (idx1 + run1), where devices match critical series */
/* values and can be combined by summing over the "S" record. */
/*--------------------------------------------------------------*/
-int serial_optimize(struct objlist *ob1, struct nlist *tp1, int idx1, int run1)
+int series_optimize(struct objlist *ob1, struct nlist *tp1, int idx1,
+ int run1, int comb)
{
struct objlist *obn;
int i;
obn = ob1;
for (i = 0; i < idx1; i++) obn = obn->next;
- return PropertyOptimize(obn, tp1, run1, TRUE);
+ return PropertyOptimize(obn, tp1, run1, TRUE, comb);
}
/*--------------------------------------------------------------*/
@@ -3705,7 +3710,7 @@ int serial_optimize(struct objlist *ob1, struct nlist *tp1, int idx1, int run1)
/* idx2 to (idx2 + run2). run1 is always larger than run2. */
/*--------------------------------------------------------------*/
-int serial_combine(struct objlist *ob1, struct nlist *tp1, int idx1, int run1,
+int series_combine(struct objlist *ob1, struct nlist *tp1, int idx1, int run1,
struct objlist *ob2, struct nlist *tp2, int idx2, int run2)
{
struct objlist *obn, *obp;
@@ -3717,11 +3722,6 @@ int serial_combine(struct objlist *ob1, struct nlist *tp1, int idx1, int run1,
obp = ob2;
for (i = 0; i < idx2; i++) obp = obp->next;
- // for (j = 0; j < run2; j++) {
- // for (i = 0; i < run1; i++) {
- // }
- // }
-
return changed;
}
@@ -3747,18 +3747,18 @@ static int compsort(const void *p1, const void *p2)
/*--------------------------------------------------------------*/
/* Sort properties of ob1 starting at property idx1 up to */
-/* property (idx1 + run). Use serial critical property for */
+/* property (idx1 + run). Use series critical property for */
/* sorting. Multiply critical property by S before sort. */
/* ob1 is the record before the first property. */
/*--------------------------------------------------------------*/
-void serial_sort(struct objlist *ob1, struct nlist *tp1, int idx1, int run)
+void series_sort(struct objlist *ob1, struct nlist *tp1, int idx1, int run)
{
struct objlist *obn, *obp;
propsort *proplist;
struct property *kl;
- struct valuelist *vl;
- int i, p, sval;
+ struct valuelist *vl, *sl;
+ int i, p, sval, merge_type;
double cval;
obn = ob1->next;
@@ -3774,22 +3774,34 @@ void serial_sort(struct objlist *ob1, struct nlist *tp1, int idx1, int run)
sval = 1;
cval = 0.0;
for (i = 0; i < run; i++) {
+ merge_type = MERGE_NONE;
for (p = 0;; p++) {
vl = &(obp->instance.props[p]);
if (vl->type == PROP_ENDLIST) break;
if (vl->key == NULL) continue;
- if (!strcmp(vl->key, "S"))
+ if (!strcmp(vl->key, "S")) {
sval = vl->value.ival;
+ sl = vl;
+ }
else {
kl = (struct property *)HashLookup(vl->key, &(tp1->propdict));
- if (kl && (kl->merge == MERGE_SER_CRIT))
+ if (kl && (kl->merge & MERGE_S_CRIT)) {
if (vl->type == PROP_INTEGER)
cval = (double)vl->value.ival;
else
cval = vl->value.dval;
+ merge_type = kl->merge & (MERGE_S_ADD | MERGE_S_PAR);
+ }
}
}
- proplist[i].value = (double)sval * cval;
+ if (merge_type == MERGE_S_ADD) {
+ proplist[i].value = cval * (double)sval;
+ sl->value.ival = 1;
+ }
+ else if (merge_type == MERGE_S_PAR) {
+ proplist[i].value = cval / (double)sval;
+ sl->value.ival = 1;
+ }
proplist[i].idx = i;
proplist[i].ob = obp;
obp = obp->next;
@@ -3816,14 +3828,15 @@ void serial_sort(struct objlist *ob1, struct nlist *tp1, int idx1, int run)
/* record. */
/*--------------------------------------------------------------*/
-int parallel_optimize(struct objlist *ob1, struct nlist *tp1, int idx1, int run1)
+int parallel_optimize(struct objlist *ob1, struct nlist *tp1, int idx1,
+ int run1, int comb)
{
struct objlist *obn;
int i;
obn = ob1;
for (i = 0; i < idx1; i++) obn = obn->next;
- return PropertyOptimize(obn, tp1, run1, FALSE);
+ return PropertyOptimize(obn, tp1, run1, FALSE, comb);
}
/*--------------------------------------------------------------*/
@@ -3844,11 +3857,6 @@ int parallel_combine(struct objlist *ob1, struct nlist *tp1, int idx1, int run1,
obp = ob2;
for (i = 0; i < idx2; i++) obp = obp->next;
- // for (j = 0; j < run2; j++) {
- // for (i = 0; i < run1; i++) {
- // }
- // }
-
return changed;
}
@@ -3864,8 +3872,9 @@ void parallel_sort(struct objlist *ob1, struct nlist *tp1, int idx1, int run)
struct objlist *obn, *obp;
propsort *proplist;
struct property *kl;
- struct valuelist *vl;
- int i, p, sval;
+ struct valuelist *vl, *ml;
+ int i, p, mval, merge_type, has_crit = FALSE;
+ char *subs_crit = NULL;
double cval;
obn = ob1->next;
@@ -3875,31 +3884,106 @@ void parallel_sort(struct objlist *ob1, struct nlist *tp1, int idx1, int run)
// value and index. Then sort that list, then use the sorted
// indexes to sort the actual property linked list.
+ // If there is no critical property listed, then it is still better
+ // to sort on any random property than on no properties. Note that
+ // this can (and should!) be made better by sorting on *all*
+ // properties, not just the first. Otherwise, circuit 1 can have, e.g.,
+ // parallel transistors with W=1, L=1 and W=1, L=2 while circuit two
+ // has W=1, L=2 and W=1, L=1 and property matching will fail because
+ // sorting was done on W only.
+
proplist = (propsort *)MALLOC(run * sizeof(propsort));
obp = obn;
- sval = 1;
+ mval = 1;
cval = 0.0;
for (i = 0; i < run; i++) {
+ merge_type = MERGE_NONE;
for (p = 0;; p++) {
vl = &(obp->instance.props[p]);
if (vl->type == PROP_ENDLIST) break;
if (vl->key == NULL) continue;
- if (!strcmp(vl->key, "S"))
- sval = vl->value.ival;
+ if (!strcmp(vl->key, "M")) {
+ mval = vl->value.ival;
+ ml = vl;
+ }
kl = (struct property *)HashLookup(vl->key, &(tp1->propdict));
if (kl == NULL) continue; /* Ignored property */
- if (kl->merge == MERGE_ADD_CRIT)
+ if (kl->merge & MERGE_P_CRIT) {
+ has_crit = TRUE;
+ if ((vl->type == PROP_STRING || vl->type == PROP_EXPRESSION) &&
+ (kl->type != vl->type))
+ PromoteProperty(kl, vl);
if (vl->type == PROP_INTEGER)
cval = (double)vl->value.ival;
+ else if (vl->type == PROP_STRING)
+ /* This is unlikely---no method to merge string properties! */
+ cval = (double)vl->value.string[0]
+ + (double)vl->value.string[1] / 10.0;
else
cval = vl->value.dval;
+ merge_type = kl->merge & (MERGE_P_ADD | MERGE_P_PAR);
+ }
+ }
+ if (merge_type == MERGE_P_ADD) {
+ proplist[i].value = cval * (double)mval;
+ ml->value.ival = 1;
+ }
+ else if (merge_type == MERGE_P_PAR) {
+ proplist[i].value = cval / (double)mval;
+ ml->value.ival = 1;
}
- proplist[i].value = (double)sval * cval;
proplist[i].idx = i;
proplist[i].ob = obp;
obp = obp->next;
}
+
+ if (has_crit == FALSE) {
+ /* If no critical property was specified, then choose the first one found */
+ /* and recalculate all the proplist values. */
+ mval = 1;
+ obp = obn;
+ merge_type = MERGE_NONE;
+ for (i = 0; i < run; i++) {
+ for (p = 0;; p++) {
+ vl = &(obp->instance.props[p]);
+ if (vl->type == PROP_ENDLIST) break;
+ if (vl->key == NULL) continue;
+ if (!strcmp(vl->key, "M")) {
+ mval = vl->value.ival;
+ ml = vl;
+ }
+ kl = (struct property *)HashLookup(vl->key, &(tp1->propdict));
+ if (kl == NULL) continue; /* Ignored property */
+ if (subs_crit == NULL)
+ subs_crit = vl->key;
+ if ((subs_crit != NULL) && !strcmp(vl->key, subs_crit)) {
+ if ((vl->type == PROP_STRING || vl->type == PROP_EXPRESSION) &&
+ (kl->type != vl->type))
+ PromoteProperty(kl, vl);
+ if (vl->type == PROP_INTEGER)
+ cval = (double)vl->value.ival;
+ else if (vl->type == PROP_STRING)
+ /* In case property is non-numeric, sort by dictionary order */
+ cval = (double)vl->value.string[0]
+ + (double)vl->value.string[1] / 10.0;
+ else
+ cval = vl->value.dval;
+ merge_type = kl->merge & (MERGE_P_ADD | MERGE_P_PAR);
+ }
+ }
+ if (merge_type == MERGE_P_ADD) {
+ proplist[i].value = cval * (double)mval;
+ ml->value.ival = 1;
+ }
+ else if (merge_type == MERGE_P_PAR) {
+ proplist[i].value = cval / (double)mval;
+ ml->value.ival = 1;
+ }
+ obp = obp->next;
+ }
+ }
+
obn = obp; /* Link from last property */
qsort(&proplist[0], run, sizeof(propsort), compsort);
@@ -3916,11 +4000,11 @@ void parallel_sort(struct objlist *ob1, struct nlist *tp1, int idx1, int run)
}
/*--------------------------------------------------------------*/
-/* Attempt to match two property lists representing serial/ */
+/* Attempt to match two property lists representing series/ */
/* parallel combinations of devices. Where the number of */
/* devices is not equal, try to reduce the one with more */
/* devices to match. If there are the same number of parallel */
-/* or serial devices, check if they match better by swapping. */
+/* or series devices, check if they match better by swapping. */
/* The goal is to get two property lists that can be checked by */
/* 1-to-1 matching in PropertyMatch(). */
/*--------------------------------------------------------------*/
@@ -3933,7 +4017,7 @@ void PropertySortAndCombine(struct objlist *pre1, struct nlist *tp1,
int p, n;
int run, cnt, idx1, idx2, max1, max2;
- int icount1, icount2, changed;
+ int icount1, icount2, changed, result;
char *netwk1, *netwk2;
char *c1, *c2;
struct valuelist *vl;
@@ -3947,6 +4031,10 @@ void PropertySortAndCombine(struct objlist *pre1, struct nlist *tp1,
iterations++;
changed = 0;
+ /* Remove group tags if they no longer contain series devices */
+ while (remove_group_tags(pre1));
+ while (remove_group_tags(pre2));
+
// How many property records are there?
// If there is only one property record in each instance then
// there is nothing to be sorted.
@@ -4007,8 +4095,8 @@ void PropertySortAndCombine(struct objlist *pre1, struct nlist *tp1,
strcat(netwk2, "D");
}
- // Printf("Diagnostic: network1 is \"%s\" "
- // "network2 is \"%s\"\n", netwk1, netwk2);
+ /* Printf("Diagnostic: network1 is \"%s\" "
+ "network2 is \"%s\"\n", netwk1, netwk2); */
/* Method to resolve any network to the largest solution that */
/* matches both sides. Use the netwk1, netwk2 strings to determine */
@@ -4021,7 +4109,7 @@ void PropertySortAndCombine(struct objlist *pre1, struct nlist *tp1,
/* in the other. If non-summing parameters of interest match, */
/* then merge all devices that can be merged until both sides */
/* have the same number of devices. */
- /* 2) Find serial devices that have more elements in one circuit */
+ /* 2) Find series devices that have more elements in one circuit */
/* than in the other. If non-summing parameters of interest */
/* match, then merge all devices that can be merged until */
/* both sides have the same number of devices. */
@@ -4076,8 +4164,19 @@ void PropertySortAndCombine(struct objlist *pre1, struct nlist *tp1,
// Printf("Circuit 1 has %d devices in parallel while circuit 2 has %d\n",
// (max1 == 1) ? 0 : max1, (max2 == 1) ? 0 : max2);
- if (max1 > 1) changed += parallel_optimize(ob1, tp1, idx1, max1);
- if (max2 > 1) changed += parallel_optimize(ob2, tp2, idx2, max2);
+ if (max1 > 1) {
+ result = parallel_optimize(ob1, tp1, idx1, max1, FALSE);
+ if (result > 0) changed += result;
+ else if ((result < 0) && (max1 > max2))
+ changed += series_optimize(ob1, tp1, idx1, max1, TRUE);
+ }
+
+ if (max2 > 1) {
+ result = parallel_optimize(ob2, tp2, idx2, max2, FALSE);
+ if (result > 0) changed += result;
+ else if ((result < 0) && (max2 > max1))
+ changed += series_optimize(ob2, tp2, idx2, max2, TRUE);
+ }
if (changed > 0) {
FREE(netwk1);
@@ -4110,9 +4209,9 @@ void PropertySortAndCombine(struct objlist *pre1, struct nlist *tp1,
}
}
- /* Case 2: Serial devices with more elements in one circuit */
+ /* Case 2: Series devices with more elements in one circuit */
- /* Find the largest group of serial devices in circuit1 */
+ /* Find the largest group of series devices in circuit1 */
run = 0;
cnt = 0;
idx1 = 0;
@@ -4136,7 +4235,7 @@ void PropertySortAndCombine(struct objlist *pre1, struct nlist *tp1,
if (*c1 == '\0') break;
}
- /* Find the largest group of serial devices in circuit2 */
+ /* Find the largest group of series devices in circuit2 */
run = 0;
cnt = 0;
idx2 = 0;
@@ -4164,10 +4263,21 @@ void PropertySortAndCombine(struct objlist *pre1, struct nlist *tp1,
// Printf("Circuit 1 has %d devices in series while circuit 2 has %d\n",
// (max1 == 1) ? 0 : max1, (max2 == 1) ? 0 : max2);
- if (max1 > 1) changed += serial_optimize(ob1, tp1, idx1, max1);
- if (max2 > 1) changed += serial_optimize(ob2, tp2, idx2, max2);
+ if (max1 > 1) {
+ result = series_optimize(ob1, tp1, idx1, max1, FALSE);
+ if (result > 0) changed += result;
+ else if ((result < 0) && (max1 > max2))
+ changed += parallel_optimize(ob1, tp1, idx1, max1, TRUE);
+ }
+ if (max2 > 1) {
+ result = series_optimize(ob2, tp2, idx2, max2, FALSE);
+ if (result > 0) changed += result;
+ else if ((result < 0) && (max2 > max1))
+ changed += parallel_optimize(ob2, tp2, idx2, max2, TRUE);
+ }
if (changed > 0) {
+
FREE(netwk1);
FREE(netwk2);
continue;
@@ -4175,21 +4285,21 @@ void PropertySortAndCombine(struct objlist *pre1, struct nlist *tp1,
if (max1 > 1) {
/* Re-link first property, because it may have been moved */
- serial_sort(pre1, tp1, idx1, max1);
+ series_sort(pre1, tp1, idx1, max1);
ob1 = pre1->next;
}
if (max2 > 1) {
/* Re-link first property, because it may have been moved */
- serial_sort(pre2, tp2, idx2, max2);
+ series_sort(pre2, tp2, idx2, max2);
ob2 = pre2->next;
}
- /* Do not run serial_combine until all other changes have been resolved */
+ /* Do not run series_combine until all other changes have been resolved */
if (changed == 0) {
if (max2 > max1)
- changed += serial_combine(ob2, tp2, idx2, max2, ob1, tp1, idx1, max1);
+ changed += series_combine(ob2, tp2, idx2, max2, ob1, tp1, idx1, max1);
else if (max1 > max2)
- changed += serial_combine(ob1, tp1, idx1, max1, ob2, tp2, idx2, max2);
+ changed += series_combine(ob1, tp1, idx1, max1, ob2, tp2, idx2, max2);
}
FREE(netwk1);
@@ -4198,7 +4308,7 @@ void PropertySortAndCombine(struct objlist *pre1, struct nlist *tp1,
/* Continue looping until there are no further changes to be made */
}
if (iterations > 1)
- Printf("No more changes can be made to serial/parallel networks.\n");
+ Printf("No more changes can be made to series/parallel networks.\n");
}
/*--------------------------------------------------------------*/
@@ -4208,7 +4318,7 @@ void PropertySortAndCombine(struct objlist *pre1, struct nlist *tp1,
/* critical property (if defined), and merge devices with the */
/* same properties (by summing property "M" for devices) */
/* */
-/* For final optimization, if run == 1 and M > 1, then merge */
+/* For final optimization, if comb == 1 and M > 1, then merge */
/* the critical property over M and set M to 1. */
/* */
/* Return the number of devices modified. */
@@ -4220,7 +4330,8 @@ typedef struct _proplink {
proplinkptr next;
} proplink;
-int PropertyOptimize(struct objlist *ob, struct nlist *tp, int run, int serial)
+int PropertyOptimize(struct objlist *ob, struct nlist *tp, int run, int series,
+ int comb)
{
struct objlist *ob2, *obt;
struct property *kl, *m_rec, **plist;
@@ -4229,11 +4340,13 @@ int PropertyOptimize(struct objlist *ob, struct nlist *tp, int run, int serial)
int pcount, p, i, j, k, pmatch, ival, crit, ctype;
double dval;
static struct valuelist nullvl, dfltvl;
- char multiple[2];
- int changed = 0;
+ char multiple[2], other[2];
+ int changed = 0, fail = 0;
multiple[1] = '\0';
- multiple[0] = (serial == TRUE) ? 'S' : 'M';
+ multiple[0] = (series == TRUE) ? 'S' : 'M';
+ other[1] = '\0';
+ other[0] = (series == TRUE) ? 'M' : 'S';
nullvl.type = PROP_INTEGER;
nullvl.value.ival = 0;
@@ -4266,15 +4379,15 @@ int PropertyOptimize(struct objlist *ob, struct nlist *tp, int run, int serial)
// To do: deal with possibility of multiple critical properties
// per instance?
- if ((serial == FALSE) && (kl->merge == MERGE_ADD_CRIT ||
- kl->merge == MERGE_PAR_CRIT)) {
+ if ((series == FALSE) && (kl->merge & MERGE_P_CRIT)) {
crit = kl->idx;
- ctype = kl->merge;
+ ctype = kl->merge & (MERGE_P_ADD | MERGE_P_PAR);
}
- else if ((serial == TRUE) && (kl->merge == MERGE_SER_CRIT)) {
+ else if ((series == TRUE) && (kl->merge & MERGE_S_CRIT)) {
crit = kl->idx;
- ctype = MERGE_ADD_CRIT;
+ ctype = kl->merge & (MERGE_S_ADD | MERGE_S_PAR);
}
+
kl = (struct property *)HashNext(&(tp->propdict));
}
// Recast the linked list as an array
@@ -4308,6 +4421,16 @@ int PropertyOptimize(struct objlist *ob, struct nlist *tp, int run, int serial)
vlist[0][i] = vl;
}
}
+ if (kl == NULL) {
+ /* Prevent setting both M > 1 and S > 1 in any one */
+ /* device, as it is ambiguous. */
+
+ if ((*matchfunc)(vl->key, other)) {
+ if (vl->type == PROP_INTEGER)
+ if (vl->value.ival > 1)
+ fail = 1;
+ }
+ }
else if (kl != NULL) {
vlist[kl->idx][i] = vl;
}
@@ -4327,174 +4450,181 @@ int PropertyOptimize(struct objlist *ob, struct nlist *tp, int run, int serial)
}
// Now combine records with same properties by summing M (S).
- for (i = 0; i < run - 1; i++) {
- for (j = 1; j < run; j++) {
- pmatch = 0;
- for (p = 1; p < pcount; p++) {
- kl = plist[p];
- vl = vlist[p][i];
- vl2 = vlist[p][j];
- if (vl == NULL && vl2 == NULL) {
- pmatch++;
- continue;
- }
+ if (comb == FALSE) {
+ for (i = 0; i < run - 1; i++) {
+ for (j = 1; j < run; j++) {
+ pmatch = 0;
+ for (p = 1; p < pcount; p++) {
+ kl = plist[p];
+ vl = vlist[p][i];
+ vl2 = vlist[p][j];
+ if (vl == NULL && vl2 == NULL) {
+ pmatch++;
+ continue;
+ }
- // If either value is missing, it takes kl->pdefault
- // and must apply promotions if necessary.
+ // If either value is missing, it takes kl->pdefault
+ // and must apply promotions if necessary.
- else if (vl == NULL || vl2 == NULL) {
- if (vl == NULL) {
- if (kl->type != vlist[p][j]->type)
+ else if (vl == NULL || vl2 == NULL) {
+ if (vl == NULL) {
+ if (kl->type != vlist[p][j]->type)
PromoteProperty(kl, vl2);
- }
- else {
- if (kl->type != vlist[p][i]->type)
+ }
+ else {
+ if (kl->type != vlist[p][i]->type)
PromoteProperty(kl, vl);
- }
- vl = &dfltvl;
- dfltvl.type = kl->type;
- switch (kl->type) {
- case PROP_STRING:
+ }
+ vl = &dfltvl;
+ dfltvl.type = kl->type;
+ switch (kl->type) {
+ case PROP_STRING:
dfltvl.value.string = kl->pdefault.string;
break;
- case PROP_INTEGER:
+ case PROP_INTEGER:
dfltvl.value.ival = kl->pdefault.ival;
break;
- case PROP_DOUBLE:
- case PROP_VALUE:
+ case PROP_DOUBLE:
+ case PROP_VALUE:
dfltvl.value.ival = kl->pdefault.ival;
break;
- case PROP_EXPRESSION:
+ case PROP_EXPRESSION:
dfltvl.value.stack = kl->pdefault.stack;
break;
- }
- }
+ }
+ }
- // Critical properties can be multiplied up by M (S) and do not
- // need to match. May want a more nuanced comparison, though.
- if (p == crit) {
- pmatch++;
- continue;
- }
+ // Critical properties can be multiplied up by M (S) and do not
+ // need to match. May want a more nuanced comparison, though.
+ if (p == crit) {
+ pmatch++;
+ continue;
+ }
- switch(vl->type) {
- case PROP_DOUBLE:
- case PROP_VALUE:
- dval = 2 * fabs(vl->value.dval - vl2->value.dval)
+ switch(vl->type) {
+ case PROP_DOUBLE:
+ case PROP_VALUE:
+ dval = 2 * fabs(vl->value.dval - vl2->value.dval)
/ (vl->value.dval + vl2->value.dval);
- if (dval <= kl->slop.dval) pmatch++;
- break;
- case PROP_INTEGER:
- ival = abs(vl->value.ival - vl2->value.ival);
- if (ival <= kl->slop.ival) pmatch++;
- break;
- case PROP_STRING:
- if ((*matchfunc)(vl->value.string, vl2->value.string)) pmatch++;
- break;
+ if (dval <= kl->slop.dval) pmatch++;
+ break;
+ case PROP_INTEGER:
+ ival = abs(vl->value.ival - vl2->value.ival);
+ if (ival <= kl->slop.ival) pmatch++;
+ break;
+ case PROP_STRING:
+ if ((*matchfunc)(vl->value.string, vl2->value.string)) pmatch++;
+ break;
- /* will not attempt to match expressions, but it could
- * be done with some minor effort by matching each
- * stack token and comparing those that are strings.
- */
- }
- }
- if (pmatch == (pcount - 1)) {
- // Sum M (S) (p == 0) records and remove one record
- if (vlist[0][i] == NULL) {
- // Add this to the end of the property record
- // find ith record in ob
- p = 0;
- for (ob2 = ob; p != i; ob2 = ob2->next, p++);
- // Count entries, add one, reallocate
- for (p = 0;; p++) {
- vl = &ob2->instance.props[p];
- if (vl->type == PROP_ENDLIST) break;
- }
- p++;
- newvlist = (struct valuelist *)CALLOC(p + 1,
- sizeof(struct valuelist));
- // Move end record forward
- vl = &newvlist[p];
- vl->key = NULL;
- vl->type = PROP_ENDLIST;
- vl->value.ival = 0;
-
- // Add "M" ("S") record behind it
- vl = &newvlist[--p];
- vl->key = strsave(multiple);
- vl->type = PROP_INTEGER;
- vl->value.ival = 1;
- vlist[0][i] = vl;
- // Copy the rest of the records and regenerate vlist
- for (--p; p >= 0; p--) {
- vl = &newvlist[p];
- vl->key = ob2->instance.props[p].key;
- vl->type = ob2->instance.props[p].type;
- vl->value = ob2->instance.props[p].value;
-
- kl = (struct property *)HashLookup(vl->key, &(tp->propdict));
- if (kl != NULL) vlist[kl->idx][i] = vl;
+ /* will not attempt to match expressions, but it could
+ * be done with some minor effort by matching each
+ * stack token and comparing those that are strings.
+ */
}
-
- // Replace instance properties with the new list
- FREE(ob2->instance.props);
- ob2->instance.props = newvlist;
}
+ if (fail == 1) {
+ /* If failure due to need to prevent M > 1 and S > 1 on */
+ /* the same device, then do not do optimization. If */
+ /* optimization could have been done, return -1. */
- if (vlist[0][j] == NULL) {
- vlist[0][j] = &nullvl; // Mark this position
- vlist[0][i]->value.ival++;
+ if (pmatch == (pcount - 1))
+ changed = -1;
}
- else if (vlist[0][i]->value.ival > 0) {
- vlist[0][i]->value.ival += vlist[0][j]->value.ival;
- vlist[0][j]->value.ival = 0;
+ else if (pmatch == (pcount - 1)) {
+ // Sum M (S) (p == 0) records and remove one record
+ if (vlist[0][i] == NULL) {
+ // Add this to the end of the property record
+ // find ith record in ob
+ p = 0;
+ for (ob2 = ob; p != i; ob2 = ob2->next, p++);
+ // Count entries, add one, reallocate
+ for (p = 0;; p++) {
+ vl = &ob2->instance.props[p];
+ if (vl->type == PROP_ENDLIST) break;
+ }
+ p++;
+ newvlist = (struct valuelist *)CALLOC(p + 1,
+ sizeof(struct valuelist));
+ // Move end record forward
+ vl = &newvlist[p];
+ vl->key = NULL;
+ vl->type = PROP_ENDLIST;
+ vl->value.ival = 0;
+
+ // Add "M" ("S") record behind it
+ vl = &newvlist[--p];
+ vl->key = strsave(multiple);
+ vl->type = PROP_INTEGER;
+ vl->value.ival = 1;
+ vlist[0][i] = vl;
+ // Copy the rest of the records and regenerate vlist
+ for (--p; p >= 0; p--) {
+ vl = &newvlist[p];
+ vl->key = ob2->instance.props[p].key;
+ vl->type = ob2->instance.props[p].type;
+ vl->value = ob2->instance.props[p].value;
+
+ kl = (struct property *)HashLookup(vl->key, &(tp->propdict));
+ if (kl != NULL) vlist[kl->idx][i] = vl;
+ }
+
+ // Replace instance properties with the new list
+ FREE(ob2->instance.props);
+ ob2->instance.props = newvlist;
+ }
+
+ if (vlist[0][j] == NULL) {
+ vlist[0][j] = &nullvl; // Mark this position
+ vlist[0][i]->value.ival++;
+ }
+ else if (vlist[0][j]->value.ival > 0) {
+ vlist[0][i]->value.ival += vlist[0][j]->value.ival;
+ vlist[0][j]->value.ival = 0;
+ }
}
+ else j++;
}
- else j++;
}
}
- // For the special case of run == 1, reduce M (or S) to 1 by
- // merging the critical property (if any)
-
- if ((run == 1) && (crit != -1) && (vlist[0][0] != NULL)) {
- int mult = vlist[0][0]->value.ival;
- if (mult > 1) {
- vl = vlist[crit][0];
-
- if ((serial == TRUE) && (ctype = MERGE_SER_CRIT)) {
- if (vl->type == PROP_INTEGER)
- vl->value.ival *= mult;
- else if (vl->type == PROP_DOUBLE)
- vl->value.dval *= (double)mult;
- vlist[0][0]->value.ival = 1;
- changed += mult;
- }
- else if (serial == FALSE && (ctype = MERGE_ADD_CRIT)) {
- if (vl->type == PROP_INTEGER)
- vl->value.ival *= mult;
- else if (vl->type == PROP_DOUBLE)
- vl->value.dval *= (double)mult;
- vlist[0][0]->value.ival = 1;
- changed += mult;
- }
- else if (serial == FALSE && (ctype = MERGE_PAR_CRIT)) {
- /* Technically one should check if divide-by-mult */
- /* reduces the value to < 1 and promote to double */
- /* if so, but that's a very unlikely case. */
- if (vl->type == PROP_INTEGER)
- vl->value.ival /= mult;
- else if (vl->type == PROP_DOUBLE)
- vl->value.dval /= (double)mult;
- vlist[0][0]->value.ival = 1;
- changed += mult;
+ // If comb == TRUE, reduce M (or S) to 1 by merging the critical
+ // property (if any)
+
+ if ((comb == TRUE) && (crit != -1)) {
+ int mult;
+ for (i = 0; i < run; i++) {
+ if (vlist[0][i] == NULL) continue;
+ mult = vlist[0][i]->value.ival;
+ if (mult > 1) {
+ changed = 0;
+ vl = vlist[crit][i];
+
+ if ((ctype == MERGE_S_ADD) || (ctype == MERGE_P_ADD)) {
+ if (vl->type == PROP_INTEGER)
+ vl->value.ival *= mult;
+ else if (vl->type == PROP_DOUBLE)
+ vl->value.dval *= (double)mult;
+ vlist[0][i]->value.ival = 1;
+ changed += mult;
+ }
+ else if ((ctype == MERGE_S_PAR) || (ctype == MERGE_P_PAR)) {
+ /* Technically one should check if divide-by-mult */
+ /* reduces the value to < 1 and promote to double */
+ /* if so, but that's a very unlikely case. */
+ if (vl->type == PROP_INTEGER)
+ vl->value.ival /= mult;
+ else if (vl->type == PROP_DOUBLE)
+ vl->value.dval /= (double)mult;
+ vlist[0][i]->value.ival = 1;
+ changed += mult;
+ }
+ if (changed > 0) {
+ if (series)
+ Printf("Combined %d series devices.\n", changed);
+ else
+ Printf("Combined %d parallel devices.\n", changed);
+ }
}
- if (changed > 0) {
- if (serial)
- Printf("Combined %d serial devices.\n", changed);
- else
- Printf("Combined %d parallel devices.\n", changed);
- }
}
}
@@ -4512,6 +4642,8 @@ int PropertyOptimize(struct objlist *ob, struct nlist *tp, int run, int serial)
ob2 = ob2->next;
}
+cleanup:
+
// Cleanup memory allocation
for (p = 0; p < pcount; p++) {
kl = (struct property *)plist[p];
@@ -5003,7 +5135,7 @@ PropertyCheckMismatch(struct objlist *tp1, struct nlist *tc1,
}
/*--------------------------------------------------------------*/
-/* Dump a description of a device's serial/parallel network */
+/* Dump a description of a device's series/parallel network */
/*--------------------------------------------------------------*/
void DumpNetwork(struct objlist *ob, int cidx)
@@ -5049,6 +5181,23 @@ void DumpNetwork(struct objlist *ob, int cidx)
}
/*--------------------------------------------------------------*/
+/* Call DumpNetwork() on each device in the object list */
+/*--------------------------------------------------------------*/
+
+void DumpNetworkAll(char *model, int file)
+{
+ struct nlist *tp;
+ struct objlist *ob;
+
+ if ((tp = LookupCellFile(model, file)) == NULL) {
+ Printf("Cell: %s does not exist.\n", model);
+ }
+ for (ob = tp->cell; ob; ob = ob->next)
+ if (ob->type == FIRSTPIN)
+ DumpNetwork(ob, file);
+}
+
+/*--------------------------------------------------------------*/
/* Compare the properties of two objects. The passed values */
/* ob1 and ob2 are pointers to the first entry (firstpin) of */
/* each object. */
@@ -5152,7 +5301,7 @@ PropertyMatch(struct objlist *ob1, struct objlist *ob2, int do_print,
#endif
}
- // Attempt to organize devices by serial and parallel combination
+ // Attempt to organize devices by series and parallel combination
if (t1type == PROPERTY && t2type == PROPERTY)
PropertySortAndCombine(obn1, tc1, obn2, tc2);
@@ -5173,7 +5322,7 @@ PropertyMatch(struct objlist *ob1, struct objlist *ob2, int do_print,
if ((t1type != PROPERTY) && (checked_one == TRUE)) {
// t2 has more property records than t1, and they did not get
// merged equally by PropertySortAndCombine().
- Fprintf(stdout, "Circuit 1 parallel/serial network does not match"
+ Fprintf(stdout, "Circuit 1 parallel/series network does not match"
" Circuit 2\n");
DumpNetwork(ob1, 1);
DumpNetwork(ob2, 2);
@@ -5224,7 +5373,7 @@ PropertyMatch(struct objlist *ob1, struct objlist *ob2, int do_print,
else if ((t2type != PROPERTY) && (checked_one == TRUE)) {
// t1 has more property records than t2, and they did not get
// merged equally by PropertySortAndCombine().
- Fprintf(stdout, "Circuit 2 parallel/serial network does not match"
+ Fprintf(stdout, "Circuit 2 parallel/series network does not match"
" Circuit 1\n");
DumpNetwork(ob1, 1);
DumpNetwork(ob2, 2);
@@ -5278,13 +5427,13 @@ PropertyMatch(struct objlist *ob1, struct objlist *ob2, int do_print,
inst2, FALSE, FALSE, &multmatch, NULL);
if (multmatch == 1) {
/* Final attempt: Reduce M to 1 on both devices */
- PropertyOptimize(tp1, tc1, 1, FALSE);
- PropertyOptimize(tp2, tc2, 1, FALSE);
+ PropertyOptimize(tp1, tc1, 1, FALSE, TRUE);
+ PropertyOptimize(tp2, tc2, 1, FALSE, TRUE);
}
else if (multmatch == 2) {
/* Final attempt: Reduce S to 1 on both devices */
- PropertyOptimize(tp1, tc1, 1, TRUE);
- PropertyOptimize(tp2, tc2, 1, TRUE);
+ PropertyOptimize(tp1, tc1, 1, TRUE, TRUE);
+ PropertyOptimize(tp2, tc2, 1, TRUE, TRUE);
}
#ifdef TCL_NETGEN
mlist =
diff --git a/base/netcmp.h b/base/netcmp.h
index 16b544e..497ea09 100644
--- a/base/netcmp.h
+++ b/base/netcmp.h
@@ -36,7 +36,8 @@ extern int EquivalenceNodes(char *name1, int file1, char *name2, int file2);
extern int EquivalenceClasses(char *name1, int file1, char *name2, int file2);
extern int IgnoreClass(char *name, int file, unsigned char type);
extern int MatchPins(struct nlist *tp1, struct nlist *tp2, int dolist);
-extern int PropertyOptimize(struct objlist *ob, struct nlist *tp, int run, int serial);
+extern int PropertyOptimize(struct objlist *ob, struct nlist *tp, int run,
+ int series, int comb);
extern int CreateCompareQueue(char *, int, char *, int);
extern int GetCompareQueueTop(char **, int *, char **, int *);
@@ -47,6 +48,9 @@ extern void PrintIllegalClasses();
extern void PrintIllegalNodeClasses();
extern void PrintIllegalElementClasses();
+extern void DumpNetwork(struct objlist *ob, int cidx);
+extern void DumpNetworkAll(char *name, int file);
+
#ifdef TCL_NETGEN
extern int EquivalentNode();
extern int EquivalentElement();
diff --git a/base/netfile.c b/base/netfile.c
index ff37c4a..36020ec 100644
--- a/base/netfile.c
+++ b/base/netfile.c
@@ -175,7 +175,7 @@ void CloseFile(char *filename)
/* STUFF TO READ INPUT FILES */
static char *line = NULL; /* actual line read in */
-static char *linetok; /* line copied to this, then munged by strtok */
+static char *linetok; /* line copied to this, then munged by strdtok */
static int linesize = 0; /* amount of memory allocated for line */
static int linenum;
char *nexttok;
@@ -191,7 +191,7 @@ struct filestack {
static struct filestack *OpenFiles = NULL;
-#define TOKEN_DELIMITER " \t\n\r"
+#define WHITESPACE_DELIMITER " \t\n\r"
/*----------------------------------------------------------------------*/
/* TrimQuoted() --- */
@@ -296,7 +296,7 @@ int GetNextLineNoNewline(char *delimiter)
strcpy(linetok, line);
TrimQuoted(linetok);
- nexttok = strtok(linetok, delimiter);
+ nexttok = strdtok(linetok, WHITESPACE_DELIMITER, delimiter);
return 0;
}
@@ -319,10 +319,9 @@ void GetNextLine(char *delimiter)
void SkipTok(char *delimiter)
{
if (nexttok != NULL &&
- (nexttok = strtok(NULL, (delimiter) ? delimiter : TOKEN_DELIMITER))
- != NULL)
+ (nexttok = strdtok(NULL, WHITESPACE_DELIMITER, delimiter)))
return;
- GetNextLine((delimiter) ? delimiter : TOKEN_DELIMITER);
+ GetNextLine(delimiter);
}
/*----------------------------------------------------------------------*/
@@ -332,7 +331,7 @@ void SkipTok(char *delimiter)
void SkipTokNoNewline(char *delimiter)
{
- nexttok = strtok(NULL, (delimiter) ? delimiter : TOKEN_DELIMITER);
+ nexttok = strdtok(NULL, WHITESPACE_DELIMITER, delimiter);
}
/*----------------------------------------------------------------------*/
@@ -354,12 +353,12 @@ void SpiceTokNoNewline(void)
{
int contline;
- if ((nexttok = strtok(NULL, TOKEN_DELIMITER)) != NULL) return;
+ if ((nexttok = strdtok(NULL, WHITESPACE_DELIMITER, NULL)) != NULL) return;
while (nexttok == NULL) {
contline = getc(infile);
if (contline == '*') {
- GetNextLine(TOKEN_DELIMITER);
+ GetNextLine(WHITESPACE_DELIMITER);
SkipNewLine(NULL);
continue;
}
@@ -367,7 +366,28 @@ void SpiceTokNoNewline(void)
ungetc(contline, infile);
return;
}
- if (GetNextLineNoNewline(TOKEN_DELIMITER) == -1) break;
+ if (GetNextLineNoNewline(WHITESPACE_DELIMITER) == -1) break;
+ }
+}
+
+/*----------------------------------------------------------------------*/
+/* Skip to the next token, ignoring any C-style comments. */
+/*----------------------------------------------------------------------*/
+
+void SkipTokComments(char *delimiter)
+{
+ SkipTok(delimiter);
+ while (nexttok) {
+ if (match(nexttok, "//")) {
+ SkipNewLine(delimiter);
+ SkipTok(delimiter);
+ }
+ else if (match(nexttok, "/*")) {
+ while (nexttok && !match(nexttok, "*/"))
+ SkipTok(delimiter);
+ if (nexttok) SkipTok(delimiter);
+ }
+ else break;
}
}
@@ -378,7 +398,7 @@ void SpiceTokNoNewline(void)
void SkipNewLine(char *delimiter)
{
while (nexttok != NULL)
- nexttok = strtok(NULL, (delimiter) ? delimiter : TOKEN_DELIMITER);
+ nexttok = strdtok(NULL, WHITESPACE_DELIMITER, delimiter);
}
/*----------------------------------------------------------------------*/
@@ -395,7 +415,7 @@ void SpiceSkipNewLine(void)
while (contline == '+') {
ungetc(contline, infile);
- GetNextLine(TOKEN_DELIMITER);
+ GetNextLine(WHITESPACE_DELIMITER);
SkipNewLine(NULL);
contline = getc(infile);
}
@@ -403,6 +423,112 @@ void SpiceSkipNewLine(void)
}
/*----------------------------------------------------------------------*/
+/* Function similar to strtok() for token parsing. The difference is */
+/* that it takes two sets of delimiters. The first is whitespace */
+/* delimiters, which separate tokens. The second is functional */
+/* delimiters, which separate tokens and have additional meaning, such */
+/* as parentheses, commas, semicolons, etc. The parser needs to know */
+/* when such tokens occur in the string, so they are returned as */
+/* individual tokens. */
+/* */
+/* Definition of delim2: String of single delimiter characters. The */
+/* special character "X" (which is never a delimiter in practice) is */
+/* used to separate single-character delimiters from two-character */
+/* delimiters (this presumably could be further extended as needed). */
+/* so ",;()" would be a valid delimiter set, but to include C-style */
+/* comments and verilog-style parameter lists, one would need */
+/* ",;()X/**///#(". */
+/*----------------------------------------------------------------------*/
+
+char *strdtok(char *pstring, char *delim1, char *delim2)
+{
+ static char *stoken = NULL;
+ static char *sstring = NULL;
+ char *s, *s2;
+ char first = FALSE;
+ int twofer;
+
+ if (pstring != NULL) {
+ /* Allocate enough memory to hold the string; tokens will be put here */
+ if (sstring != NULL) FREE(sstring);
+ sstring = (char *)MALLOC(strlen(pstring) + 1);
+ stoken = pstring;
+ first = TRUE;
+ }
+
+ /* Skip over "delim1" delimiters at the string beginning */
+ for (; *stoken; stoken++) {
+ for (s2 = delim1; *s2; s2++)
+ if (*stoken == *s2)
+ break;
+ if (*s2 == '\0') break;
+ }
+
+ if (*stoken == '\0') return NULL; /* Finished parsing */
+
+ /* "stoken" is now set. Now find the end of the current token */
+
+ /* Check string from position stoken. If a character in "delim2" is found, */
+ /* save the character in "lastdelim", null the byte at that position, and */
+ /* return the token. If a character in "delim1" is found, do the same but */
+ /* continue checking characters as long as there are contiguous "delim1" */
+ /* characters. If the series ends in a character from "delim2", then treat */
+ /* as for "delim2" above. If not, then set "lastdelim" to a null byte and */
+ /* return the token. */
+
+ for (s = stoken; *s; s++) {
+ twofer = FALSE;
+ for (s2 = delim2; s2 && *s2; s2++) {
+ if (*s2 == 'X') {
+ twofer = TRUE;
+ continue;
+ }
+ if (twofer) {
+ if ((*s == *s2) && (*(s + 1) == *(s2 + 1))) {
+ if (s == stoken) {
+ strncpy(sstring, stoken, 2);
+ *(sstring + 2) = '\0';
+ stoken = s + 2;
+ }
+ else {
+ strncpy(sstring, stoken, (int)(s - stoken));
+ *(sstring + (s - stoken)) = '\0';
+ stoken = s;
+ }
+ return sstring;
+ }
+ s2++;
+ if (*s2 == '\0') break;
+ }
+ else if (*s == *s2) {
+ if (s == stoken) {
+ strncpy(sstring, stoken, 1);
+ *(sstring + 1) = '\0';
+ stoken = s + 1;
+ }
+ else {
+ strncpy(sstring, stoken, (int)(s - stoken));
+ *(sstring + (s - stoken)) = '\0';
+ stoken = s;
+ }
+ return sstring;
+ }
+ }
+ for (s2 = delim1; *s2; s2++) {
+ if (*s == *s2) {
+ strncpy(sstring, stoken, (int)(s - stoken));
+ *(sstring + (s - stoken)) = '\0';
+ stoken = s;
+ return sstring;
+ }
+ }
+ }
+ strcpy(sstring, stoken); /* Just copy to the end */
+ stoken = s;
+ return sstring;
+}
+
+/*----------------------------------------------------------------------*/
void InputParseError(FILE *f)
{
diff --git a/base/netfile.h b/base/netfile.h
index dbf22b6..fbcf413 100644
--- a/base/netfile.h
+++ b/base/netfile.h
@@ -29,6 +29,7 @@ extern int File;
extern char *nexttok;
#define SKIPTO(a) do {SkipTok(NULL);} while (!match(nexttok,a))
+extern char *strdtok(char *pstring, char *delim1, char *delim2);
extern void SkipTok(char *delimiter);
extern void SkipTokNoNewline(char *delimiter);
extern void SkipNewLine(char *delimiter);
diff --git a/base/netgen.c b/base/netgen.c
index 6968987..2c9fc88 100644
--- a/base/netgen.c
+++ b/base/netgen.c
@@ -898,6 +898,32 @@ void SetParallelCombine(int value)
}
/*----------------------------------------------------------------------*/
+/* Same as above, for series (here for symmetry, although "property */
+/* series all" would be an odd command to issue, and "property series */
+/* none" is the default, so not needed). */
+/*----------------------------------------------------------------------*/
+
+struct nlist *SetSeriesCombineFlag(struct hashlist *p, void *clientdata)
+{
+ struct nlist *ptr;
+ int *value = (int *)clientdata;
+
+ ptr = (struct nlist *)(p->ptr);
+ if (*value == TRUE)
+ ptr->flags &= (~COMB_SERIES);
+ else
+ ptr->flags |= COMB_SERIES;
+
+ return NULL; /* NULL keeps search alive */
+}
+
+void SetSeriesCombine(int value)
+{
+ ClearDumpedList();
+ RecurseCellHashTable2(SetSeriesCombineFlag, (void *)(&value));
+}
+
+/*----------------------------------------------------------------------*/
/* Delete a property from the master cell record. */
/*----------------------------------------------------------------------*/
@@ -992,15 +1018,15 @@ PropertyTolerance(char *name, int fnum, char *key, int ival, double dval)
/*----------------------------------------------------------------------*/
int
-PropertyMerge(char *name, int fnum, char *key, int merge_type)
+PropertyMerge(char *name, int fnum, char *key, int merge_type, int merge_mask)
{
struct property *kl = NULL;
struct nlist *tc;
int result;
if ((fnum == -1) && (Circuit1 != NULL) && (Circuit2 != NULL)) {
- result = PropertyMerge(name, Circuit1->file, key, merge_type);
- result = PropertyMerge(name, Circuit2->file, key, merge_type);
+ result = PropertyMerge(name, Circuit1->file, key, merge_type, merge_mask);
+ result = PropertyMerge(name, Circuit2->file, key, merge_type, merge_mask);
return result;
}
@@ -1016,7 +1042,8 @@ PropertyMerge(char *name, int fnum, char *key, int merge_type)
return -1;
}
else {
- kl->merge = merge_type;
+ kl->merge &= ~merge_mask;
+ kl->merge |= merge_type;
}
return 0;
}
@@ -2462,8 +2489,7 @@ int ConvertStringToInteger(char *string, int *ival)
*ival = (int)lval;
return 1;
}
- else if (eptr == string)
- return 0; /* No conversion */
+ else return 0; /* No conversion */
}
/*--------------------------------------------------------------*/
@@ -2868,50 +2894,50 @@ void ConnectAllNodes(char *model, int file)
}
/*----------------------------------------------------------------------*/
-/* Serial and Parallel combination: */
-/* All devices of the same type that exist in serial and parallel */
+/* Series and Parallel combination: */
+/* All devices of the same type that exist in series and parallel */
/* combinations will be treated as a single device in a network. */
-/* Serial connections are only allowed for resistors and inductors. */
-/* Any device may be connected in parallel. For combinations of serial */
+/* Series connections are only allowed for resistors and inductors. */
+/* Any device may be connected in parallel. For combinations of series */
/* and parallel, as in a resistor network, there is a set of rules: */
/* */
-/* Running parallel and serial checks: */
+/* Running parallel and series checks: */
/* 1. Run parallel once. If a repeat run and no devices are merged, */
/* then go to 4. */
-/* 2. Run serial until no devices are merged. */
-/* 3. If serial ran more than once, then go to 1. */
+/* 2. Run series until no devices are merged. */
+/* 3. If series ran more than once, then go to 1. */
/* 4. End merge */
/* */
/* Each merge procedure, when it finds two devices that can be merged, */
/* removes the second device from the netlist and adds its properties */
-/* to the first device. If a serial merge, then the nodes are adjusted */
+/* to the first device. If a series merge, then the nodes are adjusted */
/* appropriately. Where A is the property list of the first device and */
/* B is the property list of the second device, the first and last */
/* properties of A and the first property of B may require a marker to */
/* indicate the topology of the network, as follows (in order): */
/* */
/* For a parallel merge: */
-/* 1) If A has serial components then tag first property of A with */
+/* 1) If A has series components then tag first property of A with */
/* "open" and tag first property of B with "close". */
-/* 2) If B has serial components then tag first property of B with */
+/* 2) If B has series components then tag first property of B with */
/* "open". */
/* */
-/* For a serial merge: */
+/* For a series merge: */
/* 1) If A has unbalanced "opens", then add "close" to first */
/* property of B to balance the "opens". */
-/* 2) Always tag B with "serial". */
+/* 2) Always tag B with "series". */
/* */
/* Tags are indicated by a property named "_tag" which has a string */
-/* value of ordered characters, "+" for serial, "(" for open, and ")" */
+/* value of ordered characters, "+" for series, "(" for open, and ")" */
/* for close. A device with only one property record has no "_tag" */
/* record. A device which is in parallel with the device(s) in front */
/* of it is implicitly parallel by not having an "+" tag, and may not */
/* have a tag at all. */
/* */
/* The property check routine is responsible for comparing device */
-/* serial/parallel networks against each other. Otherwise, each */
-/* serial/parallel network is considered topologically as a single */
-/* device, and any differences in the serial/parallel networks between */
+/* series/parallel networks against each other. Otherwise, each */
+/* series/parallel network is considered topologically as a single */
+/* device, and any differences in the series/parallel networks between */
/* two circuits being matched will be treated as a property error. */
/*----------------------------------------------------------------------*/
@@ -2927,7 +2953,8 @@ int add_prop_tag(struct objlist *obr, char tagc)
char *tmpstr;
hastag = FALSE;
- for (nob = obr; nob->next && nob->next->type == PROPERTY; nob = nob->next) {
+ for (nob = obr; nob; nob = nob->next) {
+ if (nob->type != PROPERTY) break;
for (i = 0; ; i++) {
kv = &(nob->instance.props[i]);
if (kv->type == PROP_ENDLIST) break;
@@ -3018,6 +3045,75 @@ void add_balancing_close(struct objlist *ob1, struct objlist *ob2)
while (opentags-- > 0) add_prop_tag(nob, ')');
}
+/* Remove unneeded group tags, when device merging has removed all but */
+/* one, or all but parallel devices inside a group. For simplicity, */
+/* handle only one group at a time. Return 1 if a group was removed */
+/* and 0 if not. The caller should run repeatedly until the routine */
+/* returns 0. */
+
+int remove_group_tags(struct objlist *ob)
+{
+ struct objlist *nob, *sob;
+ int i, si, stags;
+ struct valuelist *kv;
+ char *tag;
+
+ /* Find the first property record in ob. */
+ for (nob = ob->next; nob && nob->type != FIRSTPIN; nob = nob->next)
+ if (nob->type == PROPERTY)
+ break;
+ if (nob->type != PROPERTY) return 0; // shouldn't happen
+
+ for (sob = NULL; nob && nob->type == PROPERTY; nob = nob->next) {
+ for (i = 0; ; i++) {
+ kv = &(nob->instance.props[i]);
+ if (kv->type == PROP_ENDLIST) break;
+ if (kv->type == PROP_STRING) {
+ if (!strcmp(kv->key, "_tag")) {
+ for (tag = kv->value.string; *tag != '\0'; tag++) {
+ if (*tag == '(') {
+ sob = nob; /* Save position of open group */
+ si = i; /* Save index of open group */
+ stags = 0; /* Check for series tags */
+ }
+ else if (*tag == '+')
+ stags++;
+ else if (*tag == ')') {
+ if (stags == 0) {
+ /* Remove close tag */
+ for (++i; ; i++) {
+ nob->instance.props[i - 1] = nob->instance.props[i];
+ if (nob->instance.props[i].type == PROP_ENDLIST) break;
+ }
+ /* Remove open tag */
+ for (i = si + 1; ; i++) {
+ sob->instance.props[i - 1] = sob->instance.props[i];
+ if (sob->instance.props[i].type == PROP_ENDLIST) break;
+ }
+ return 1;
+ }
+ sob = NULL;
+ stags = 0;
+ }
+ }
+ }
+ }
+ }
+ }
+ if (sob != NULL) {
+ /* Implicit close tag at end */
+ if (stags == 0) {
+ /* Remove open tag */
+ for (i = si + 1; ; i++) {
+ sob->instance.props[i - 1] = sob->instance.props[i];
+ if (sob->instance.props[i].type == PROP_ENDLIST) break;
+ }
+ return 1;
+ }
+ }
+ return 0;
+}
+
/*----------------------------------------------------------------------*/
/* Find all devices that are of the same class and check for parallel */
/* combinations, and combine them where found, adjusting property "M" */
@@ -3229,7 +3325,7 @@ int CombineParallel(char *model, int file)
if (propfirst != NULL) {
- // Serial/Parallel logic:
+ // Series/Parallel logic:
// If propfirst has _tag in properties,
// then add an "open" tag at propfirst
add_prop_tag(propfirst, '(');
@@ -3272,9 +3368,9 @@ int CombineParallel(char *model, int file)
}
/*----------------------------------------------------------------------*/
-/* For the purposes of serial connection checking, find if all pins */
+/* For the purposes of series connection checking, find if all pins */
/* of two instances after the first two pins are connected to the name */
-/* nodes. This depends on the definition of a serial device as having */
+/* nodes. This depends on the definition of a series device as having */
/* two ports, but any additional ports (such as a substrate connection) */
/* must be the same for all devices in series. */
/*----------------------------------------------------------------------*/
@@ -3284,7 +3380,7 @@ int check_pin_nodes(struct objlist *ob1, struct objlist *ob2)
struct objlist *nob, *pob;
/* A dummy device may have both terminals connected to the same */
- /* point, triggering a false check for a serial device. */
+ /* point, triggering a false check for a series device. */
if (ob1 == ob2) return FALSE;
for (nob = ob1->next; nob && nob->type != FIRSTPIN; nob = nob->next)
@@ -3313,12 +3409,12 @@ int check_pin_nodes(struct objlist *ob1, struct objlist *ob2)
/* one. */
/* */
/* This routine depends on CombineParallel() being run first so that no */
-/* parallel devices are reported as serial. */
+/* parallel devices are reported as series. */
/* */
/* Return the number of devices merged. */
/*----------------------------------------------------------------------*/
-int CombineSerial(char *model, int file)
+int CombineSeries(char *model, int file)
{
struct nlist *tp, *tp2;
struct objlist ***instlist;
@@ -3331,7 +3427,7 @@ int CombineSerial(char *model, int file)
return -1;
}
/* Diagnostic */
- /* Printf("CombineSerial start model = %s file = %d\n", model, file); */
+ /* Printf("CombineSeries start model = %s file = %d\n", model, file); */
instlist = (struct objlist ***)CALLOC((tp->nodename_cache_maxnodenum + 1),
sizeof(struct objlist **));
@@ -3346,26 +3442,36 @@ int CombineSerial(char *model, int file)
instlist[ob->node] = (struct objlist **)CALLOC(2,
sizeof(struct objlist *));
- /* Device must be marked as able to be combined in serial. */
+ /* Device must be marked as able to be combined in series. */
/* Note that devices with more than two pins are expected */
- /* to serial connect along the first two pins, and the */
+ /* to series connect along the first two pins, and the */
/* remaining pins must all connect to the same nodes. By */
/* default, CLASS_RES, CLASS_RES3, and CLASS_INDUCTOR are */
- /* all allowed to combine in serial. All other devices */
- /* must have serial combination explicitly enabled. */
+ /* all allowed to combine in series. All other devices */
+ /* must have series combination explicitly enabled. */
/* NOTE: Arbitrarily, the first two pins of a device are */
- /* assumed to be the ones that make serial connections. */
+ /* assumed to be the ones that make series connections. */
/* Additional pins, if any, do not. */
tp2 = LookupCellFile(ob->model.class, file);
- if ((tp2->flags & COMB_SERIAL) && (ob->type <= 2))
+ if ((tp2->flags & COMB_SERIES) && (ob->type <= 2)) {
instlist[ob->node][0] = obp;
+
+ /* Node may not be a port of the subcircuit */
+ for (obn = tp->cell; obn && obn->type == PORT; obn = obn->next) {
+ if (obn->node == ob->node) {
+ /* invalidate node */
+ instlist[ob->node][0] = NULL;
+ break;
+ }
+ }
+ }
else
/* invalidate node */
instlist[ob->node][0] = NULL;
}
else if (instlist[ob->node][0] == NULL) {
- /* Node is not valid for serial connection */
+ /* Node is not valid for series connection */
}
else if (instlist[ob->node][1] == NULL) {
/* Check if first instance is the same type */
@@ -3393,7 +3499,7 @@ int CombineSerial(char *model, int file)
struct valuelist *kv2;
/* Diagnostic */
- /* Fprintf(stdout, "Found serial instances %s and %s\n",
+ /* Fprintf(stdout, "Found series instances %s and %s\n",
instlist[i][0]->instance.name,
instlist[i][1]->instance.name); */
scnt++;
@@ -3504,7 +3610,7 @@ int CombineSerial(char *model, int file)
obs = obn;
}
- /* If 2nd device appears anywhere else in the serial device */
+ /* If 2nd device appears anywhere else in the series device */
/* list, replace it with the 1st device. */
for (j = i + 1; j <= tp->nodename_cache_maxnodenum; j++) {
if (instlist[j] == NULL) continue;
diff --git a/base/netgen.h b/base/netgen.h
index 5b33f9e..a3a18e7 100644
--- a/base/netgen.h
+++ b/base/netgen.h
@@ -36,9 +36,11 @@ extern struct property *PropertyString(char *name, int fnum, char *key,
double slop, char *pdefault);
extern int PropertyDelete(char *name, int fnum, char *key);
extern void SetParallelCombine(int value);
+extern void SetSeriesCombine(int value);
extern int PropertyTolerance(char *name, int fnum, char *key, int ival,
double dval);
-extern int PropertyMerge(char *name, int fnum, char *key, int merge_type);
+extern int PropertyMerge(char *name, int fnum, char *key, int merge_type,
+ int merge_mask);
extern void ResolveProperties(char *name1, int file1, char *name2, int file2);
extern void CopyProperties(struct objlist *obj_to, struct objlist *obj_from);
extern int PromoteProperty(struct property *, struct valuelist *);
@@ -120,7 +122,7 @@ extern void ConvertGlobals(char *name, int fnum);
extern int CleanupPins(char *name, int fnum);
extern void ConnectAllNodes(char *model, int fnum);
extern int CombineParallel(char *model, int fnum);
-extern int CombineSerial(char *model, int fnum);
+extern int CombineSeries(char *model, int fnum);
extern int NoDisconnectedNodes;
extern int PropertyKeyMatch(char *, char *);
extern int PropertyValueMatch(char *, char *);
diff --git a/base/objlist.h b/base/objlist.h
index 7a5763c..6e8be6c 100644
--- a/base/objlist.h
+++ b/base/objlist.h
@@ -103,18 +103,28 @@ struct valuelist {
/* Part 3: Keys & Defaults (kept in the cell record as a hash table) */
-#define MERGE_NONE 0 /* Property does not change when devices merge */
-#define MERGE_ADD 1 /* Properties sum with device parallel merge */
-#define MERGE_ADD_CRIT 2 /* Properties sum with device parallel merge */
-#define MERGE_PAR 3 /* Properties add in parallel with device merge */
-#define MERGE_PAR_CRIT 4 /* Properties add in parallel with device merge */
-#define MERGE_SER 5 /* Properties sum with device parallel merge */
-#define MERGE_SER_CRIT 6 /* Properties sum with device parallel merge */
+#define MERGE_NONE 0x00 /* Property does not change when devices merge */
+
+#define MERGE_P_ADD 0x01 /* Properties sum with device parallel merge */
+#define MERGE_P_PAR 0x02 /* Properties add in parallel with parallel merge */
+#define MERGE_P_CRIT 0x04 /* This property enables parallel merging */
+
+#define MERGE_S_ADD 0x08 /* Properties sum with device series merge */
+#define MERGE_S_PAR 0x10 /* Properties add in parallel with series merge */
+#define MERGE_S_CRIT 0x20 /* This property enables series merging */
+
+#define MERGE_P_MASK (MERGE_P_ADD | MERGE_P_PAR | MERGE_P_CRIT)
+#define MERGE_S_MASK (MERGE_S_ADD | MERGE_S_PAR | MERGE_S_CRIT)
+#define MERGE_ALL_MASK (MERGE_P_MASK | MERGE_S_MASK)
+
+/* Although the above are flags, "ADD" and "PAR" are mutually exclusive. */
/* Note: A "critical" merge means that the property causes the number of */
/* devices to change. e.g., transistor width is critical; transistor drain */
/* area sums when devices are merged, but does not change the number of devices.*/
/* More than one property can be critical. e.g., width and number of fingers. */
+/* Also it is possible for a property (e.g., "value") to be critical for both */
+/* series and parallel merging. */
struct property {
char *key; /* name of the property */
@@ -217,7 +227,7 @@ struct nlist {
/* Flags for combination allowances and prohibitions */
-#define COMB_SERIAL 0x40
+#define COMB_SERIES 0x40
#define COMB_NO_PARALLEL 0x80
extern struct nlist *CurrentCell;
diff --git a/base/verilog.c b/base/verilog.c
index f72c380..0eaa59e 100644
--- a/base/verilog.c
+++ b/base/verilog.c
@@ -57,8 +57,10 @@ the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
#include "netfile.h"
#include "print.h"
-#define VLOG_DELIMITERS " \t\r\n,;"
-#define VLOG_DELIMITERS2 " \t\r\n,()"
+// See netfile.c for explanation of delimiters. 'X'
+// separates single-character delimiters from two-character delimiters.
+#define VLOG_DELIMITERS ",;:(){}[]=X///**/#("
+#define VLOG_PIN_NAME_DELIMITERS "()X///**/"
// Global storage for verilog parameters
struct hashdict verilogparams;
@@ -95,21 +97,229 @@ struct bus *NewBus()
return (wb);
}
+//-------------------------------------------------------------------------
// Get bus indexes from the notation name[a:b]. If there is only "name"
// then look up the name in the bus hash list and return the index bounds.
// Return 0 on success, 1 on syntax error, and -1 if signal is not a bus.
+//
+// Note that this routine relies on the delimiter characters including
+// "[", ":", and "]" when calling NextTok.
+//-------------------------------------------------------------------------
+
+int GetBusTok(struct bus *wb)
+{
+ int result, start, end;
+ struct property *kl = NULL;
+
+ if (wb == NULL) return 0;
+ else {
+ wb->start = -1;
+ wb->end = -1;
+ }
+
+ if (match(nexttok, "[")) {
+ SkipTokComments(VLOG_DELIMITERS);
+
+ // Check for parameter names and substitute values if found.
+ if (nexttok[0] == '`') {
+ kl = (struct property *)HashLookup(nexttok + 1, &verilogdefs);
+ if (kl == NULL) {
+ Printf("Unknown definition %s found in array notation.\n", nexttok);
+ }
+ else {
+ if (kl->type == PROP_STRING) {
+ result = sscanf(kl->pdefault.string, "%d", &start);
+ if (result != 1) {
+ Printf("Cannot parse first digit from parameter %s value %s\n",
+ nexttok, kl->pdefault.string);
+ return 1;
+ }
+ }
+ else if (kl->type == PROP_INTEGER) {
+ start = kl->pdefault.ival;
+ }
+ else if (kl->type == PROP_DOUBLE) {
+ start = (int)kl->pdefault.dval;
+ if ((double)start != kl->pdefault.dval) {
+ Printf("Cannot parse first digit from parameter %s value %g\n",
+ nexttok, kl->pdefault.dval);
+ return 1;
+ }
+ }
+ else {
+ Printf("Parameter %s has unknown type; don't know how to parse.\n",
+ nexttok);
+ return 1;
+ }
+ }
+ }
+ else {
+ result = sscanf(nexttok, "%d", &start);
+ if (result != 1) {
+ // Is name in the parameter list?
+ kl = (struct property *)HashLookup(nexttok, &verilogparams);
+ if (kl == NULL) {
+ Printf("Array value %s is not a number or a parameter.\n",
+ nexttok);
+ return 1;
+ }
+ else {
+ if (kl->type == PROP_STRING) {
+ result = sscanf(kl->pdefault.string, "%d", &start);
+ if (result != 1) {
+ Printf("Parameter %s has value %s that cannot be parsed"
+ " as an integer.\n", nexttok, kl->pdefault.string);
+ return 1;
+ }
+ }
+ else if (kl->type == PROP_INTEGER) {
+ start = kl->pdefault.ival;
+ }
+ else if (kl->type == PROP_DOUBLE) {
+ start = (int)kl->pdefault.dval;
+ if ((double)start != kl->pdefault.dval) {
+ Printf("Parameter %s has value %g that cannot be parsed"
+ " as an integer.\n", nexttok, kl->pdefault.dval);
+ return 1;
+ }
+ }
+ else {
+ Printf("Parameter %s has unknown type; don't know how"
+ " to parse.\n", nexttok);
+ return 1;
+ }
+ }
+ }
+ }
+ SkipTokComments(VLOG_DELIMITERS);
+ if (match(nexttok, "]")) {
+ result = 1;
+ end = start; // Single bit
+ }
+ else if (!match(nexttok, ":")) {
+ Printf("Badly formed array notation: Expected colon, found %s\n", nexttok);
+ return 1;
+ }
+ else {
+ SkipTokComments(VLOG_DELIMITERS);
+
+ // Check for parameter names and substitute values if found.
+ if (nexttok[0] == '`') {
+ kl = (struct property *)HashLookup(nexttok + 1, &verilogdefs);
+ if (kl == NULL) {
+ Printf("Unknown definition %s found in array notation.\n", nexttok);
+ }
+ else {
+ if (kl->type == PROP_STRING) {
+ result = sscanf(kl->pdefault.string, "%d", &end);
+ if (result != 1) {
+ Printf("Cannot parse second digit from parameter "
+ "%s value %s\n", nexttok, kl->pdefault.string);
+ return 1;
+ }
+ }
+ else if (kl->type == PROP_INTEGER) {
+ end = kl->pdefault.ival;
+ }
+ else if (kl->type == PROP_DOUBLE) {
+ end = (int)kl->pdefault.dval;
+ if ((double)end != kl->pdefault.dval) {
+ Printf("Cannot parse second digit from parameter "
+ "%s value %g\n", nexttok, kl->pdefault.dval);
+ return 1;
+ }
+ }
+ else {
+ Printf("Parameter %s has unknown type; don't know how"
+ " to parse.\n", nexttok);
+ return 1;
+ }
+ }
+ }
+ else {
+ result = sscanf(nexttok, "%d", &end);
+ if (result != 1) {
+ // Is name in the parameter list?
+ kl = (struct property *)HashLookup(nexttok, &verilogparams);
+ if (kl == NULL) {
+ Printf("Array value %s is not a number or a parameter.\n",
+ nexttok);
+ return 1;
+ }
+ else {
+ if (kl->type == PROP_STRING) {
+ result = sscanf(kl->pdefault.string, "%d", &end);
+ if (result != 1) {
+ Printf("Parameter %s has value %s that cannot be parsed"
+ " as an integer.\n", nexttok,
+ kl->pdefault.string);
+ return 1;
+ }
+ }
+ else if (kl->type == PROP_INTEGER) {
+ end = kl->pdefault.ival;
+ }
+ else if (kl->type == PROP_DOUBLE) {
+ end = (int)kl->pdefault.dval;
+ if ((double)end != kl->pdefault.dval) {
+ Printf("Cannot parse second digit from parameter "
+ "%s value %g\n", nexttok, kl->pdefault.dval);
+ return 1;
+ }
+ }
+ else {
+ Printf("Parameter %s has unknown type; don't know how"
+ " to parse.\n", nexttok);
+ return 1;
+ }
+ }
+ }
+ }
+ }
+ wb->start = start;
+ wb->end = end;
+
+ while (!match(nexttok, "]")) {
+ SkipTokComments(VLOG_DELIMITERS);
+ if (nexttok == NULL) {
+ Printf("End of file reached while reading array bounds.\n");
+ return 1;
+ }
+ else if (match(nexttok, ";")) {
+ // Better than reading to end-of-file, give up on end-of-statement
+ Printf("End of statement reached while reading array bounds.\n");
+ return 1;
+ }
+ }
+ }
+ else {
+ struct bus *hbus;
+ hbus = (struct bus *)HashLookup(nexttok, &buses);
+ if (hbus != NULL) {
+ wb->start = hbus->start;
+ wb->end = hbus->end;
+ }
+ else
+ return -1;
+ }
+ return 0;
+}
+
+//--------------------------------------------------------------------
+// GetBus() is similar to GetBusTok() (see above), but it parses from
+// a string instead of the input tokenizer.
+//--------------------------------------------------------------------
int GetBus(char *astr, struct bus *wb)
{
char *colonptr, *brackstart, *brackend;
int result, start, end;
- if (wb == NULL) return;
+ if (wb == NULL) return 0;
else {
wb->start = -1;
wb->end = -1;
}
-
brackstart = strchr(astr, '[');
if (brackstart != NULL) {
brackend = strchr(astr, ']');
@@ -129,10 +339,10 @@ int GetBus(char *astr, struct bus *wb)
}
if (colonptr)
result = sscanf(colonptr + 1, "%d", &end);
- else {
+ else {
result = 1;
- end = start; // Single bit
- }
+ end = start; // Single bit
+ }
*brackend = ']';
if (result != 1) {
Printf("Badly formed array notation \"%s\"\n", astr);
@@ -370,10 +580,11 @@ extern void PopStack(struct cellstack **top);
void ReadVerilogFile(char *fname, int filenum, struct cellstack **CellStackPtr,
int blackbox)
{
- int cdnum = 1, rdnum = 1, i;
+ int cdnum = 1, rdnum = 1, i, ival;
int warnings = 0, hasports, inlined_decls = 0, localcount = 1;
- char devtype, in_module, in_comment, in_param;
- char *eqptr, *parptr, *matchptr;
+ double dval;
+ char devtype, in_module, in_param;
+ char *eqptr, *matchptr;
struct keyvalue *kvlist = NULL;
char inst[256], model[256], instname[256], portname[256], pkey[256];
struct nlist *tp;
@@ -383,33 +594,24 @@ void ReadVerilogFile(char *fname, int filenum, struct cellstack **CellStackPtr,
model[255] = '\0';
instname[255] = '\0';
in_module = (char)0;
- in_comment = (char)0;
in_param = (char)0;
while (!EndParseFile()) {
- SkipTok(VLOG_DELIMITERS); /* get the next token */
+ SkipTokComments(VLOG_DELIMITERS); /* get the next token */
if ((EndParseFile()) && (nexttok == NULL)) break;
+ else if (nexttok == NULL)
+ break;
- /* Handle comment blocks */
- if (nexttok[0] == '/' && nexttok[1] == '*') {
- in_comment = (char)1;
- }
- else if (nexttok[0] == '*' && nexttok[1] == '/') {
- in_comment = (char)0;
- continue;
- }
- if (in_comment == (char)1) continue;
-
- /* Handle comment lines */
- if (match(nexttok, "//"))
- SkipNewLine(VLOG_DELIMITERS);
+ /* Ignore end-of-statement markers */
+ else if (match(nexttok, ";"))
+ continue;
/* Ignore primitive definitions */
else if (match(nexttok, "primitive")) {
while (1) {
SkipNewLine(VLOG_DELIMITERS);
- SkipTok(VLOG_DELIMITERS);
+ SkipTokComments(VLOG_DELIMITERS);
if (EndParseFile()) break;
if (match(nexttok, "endprimitive")) {
in_module = 0;
@@ -505,54 +707,34 @@ void ReadVerilogFile(char *fname, int filenum, struct cellstack **CellStackPtr,
/* definition, and those which declare everything */
/* inside the pin list. */
- SkipTok(VLOG_DELIMITERS);
+ SkipTokComments(VLOG_DELIMITERS);
// Check for parameters within #( ... )
if (match(nexttok, "#(")) {
- SkipTok(VLOG_DELIMITERS);
- while (match(nexttok, "//")) {
- SkipNewLine(VLOG_DELIMITERS);
- SkipTok(VLOG_DELIMITERS);
- }
+ SkipTokComments(VLOG_DELIMITERS);
in_param = (char)1;
}
- else if (nexttok[0] == '(') {
- if (match(nexttok, "("))
- SkipTok(VLOG_DELIMITERS);
- else
- nexttok++;
- while (match(nexttok, "//")) {
- SkipNewLine(VLOG_DELIMITERS);
- SkipTok(VLOG_DELIMITERS);
- }
+ else if (match(nexttok, "(")) {
+ SkipTokComments(VLOG_DELIMITERS);
}
wb.start = wb.end = -1;
- while ((nexttok != NULL) && (nexttok[0] != ';')) {
+ while ((nexttok != NULL) && !match(nexttok, ";")) {
if (in_param) {
- if (!strcmp(nexttok, ")")) {
+ if (match(nexttok, ")")) {
in_param = (char)0;
- SkipTok(VLOG_DELIMITERS);
- if (strcmp(nexttok, "(")) {
+ SkipTokComments(VLOG_DELIMITERS);
+ if (!match(nexttok, "(")) {
Fprintf(stderr, "Badly formed module block parameter list.\n");
goto skip_endmodule;
}
}
- else if ((eqptr = strchr(nexttok, '=')) != NULL) {
- double dval;
-
- *eqptr = '\0';
- /* In case the variable name is not followed by whitespace */
- if (eqptr > nexttok) strcpy(pkey, nexttok);
- eqptr++;
-
- // Equal sign may be followed by whitespace, in which case
- // the parameter value is the next token.
- if (strlen(eqptr) == 0) {
- SkipTok(VLOG_DELIMITERS); /* get the next token */
- eqptr = nexttok;
- }
+ else if (match(nexttok, "=")) {
+
+ // The parameter value is the next token.
+ SkipTokComments(VLOG_DELIMITERS); /* get the next token */
+ eqptr = nexttok;
// Try first as a double, otherwise it's a string
// Double value's slop defaults to 1%.
@@ -566,7 +748,7 @@ void ReadVerilogFile(char *fname, int filenum, struct cellstack **CellStackPtr,
strcpy(pkey, nexttok);
}
}
- else {
+ else if (!match(nexttok, ",")) {
if (match(nexttok, ")")) break;
// Ignore input, output, and inout keywords, and handle buses.
@@ -579,8 +761,8 @@ void ReadVerilogFile(char *fname, int filenum, struct cellstack **CellStackPtr,
if (!match(nexttok, "input") && !match(nexttok, "output") &&
!match(nexttok, "inout") && !match(nexttok, "real") &&
!match(nexttok, "logic") && !match(nexttok, "integer")) {
- if (nexttok[0] == '[') {
- if (GetBus(nexttok, &wb) != 0) {
+ if (match(nexttok, "[")) {
+ if (GetBusTok(&wb) != 0) {
// Didn't parse as a bus, so wing it
wb.start = wb.end = -1;
Port(nexttok);
@@ -603,21 +785,15 @@ void ReadVerilogFile(char *fname, int filenum, struct cellstack **CellStackPtr,
wb.start = wb.end = -1;
}
else {
- char *pptr;
-
- if ((pptr = strrchr(nexttok, ')')) != NULL)
- *pptr = '\0';
Port(nexttok);
- if (pptr != NULL) break;
}
}
hasports = 1;
}
}
}
- SkipTok(VLOG_DELIMITERS);
+ SkipTokComments(VLOG_DELIMITERS);
if (nexttok == NULL) break;
- while (match(nexttok, "//")) { SkipNewLine(VLOG_DELIMITERS); SkipTok(VLOG_DELIMITERS); }
}
SetClass((blackbox) ? CLASS_MODULE : CLASS_SUBCKT);
@@ -638,7 +814,7 @@ skip_endmodule:
while (1) {
SkipNewLine(VLOG_DELIMITERS);
- SkipTok(VLOG_DELIMITERS);
+ SkipTokComments(VLOG_DELIMITERS);
if (EndParseFile()) break;
if (match(nexttok, "endmodule")) {
in_module = 0;
@@ -649,10 +825,47 @@ skip_endmodule:
}
else if (match(nexttok, "input") || match(nexttok, "output")
|| match(nexttok, "inout")) {
+ struct bus wb;
- // To be completed: Duplicate parsing of ports, except as statements
- // and not in the module pin list.
- SkipNewLine(VLOG_DELIMITERS);
+ // Parsing of ports as statements not in the module pin list.
+ wb.start = wb.end = -1;
+ while (1) {
+ SkipTokComments(VLOG_DELIMITERS);
+ if (EndParseFile()) break;
+
+ if (match(nexttok, ";")) {
+ // End of statement
+ break;
+ }
+ else if (match(nexttok, "[")) {
+ if (GetBusTok(&wb) != 0) {
+ // Didn't parse as a bus, so wing it
+ wb.start = wb.end = -1;
+ Port(nexttok);
+ }
+ }
+ else if (!match(nexttok, ",")) {
+ if (wb.start != -1) {
+ if (wb.start > wb.end) {
+ for (i = wb.start; i >= wb.end; i--) {
+ sprintf(portname, "%s[%d]", nexttok, i);
+ Port(portname);
+ }
+ }
+ else {
+ for (i = wb.start; i <= wb.end; i++) {
+ sprintf(portname, "%s[%d]", nexttok, i);
+ Port(portname);
+ }
+ }
+ wb.start = wb.end = -1;
+ }
+ else {
+ Port(nexttok);
+ }
+ }
+ hasports = 1;
+ }
}
else if (match(nexttok, "endmodule")) {
@@ -749,15 +962,33 @@ skip_endmodule:
kl = NewProperty();
kl->key = strsave(nexttok);
kl->idx = 0;
- kl->type = PROP_STRING;
- kl->slop.dval = 0.0;
+ kl->merge = MERGE_NONE;
SkipTokNoNewline(VLOG_DELIMITERS);
- if ((nexttok == NULL) || (nexttok[0] == '\0'))
- // Let "`define X" be equivalent to "`define X 1"
- kl->pdefault.string = strsave("1");
- else
+ if ((nexttok == NULL) || (nexttok[0] == '\0')) {
+ // Let "`define X" be equivalent to "`define X 1". Use integer value.
+ kl->type = PROP_INTEGER;
+ kl->pdefault.ival = 1;
+ kl->slop.ival = 0;
+ }
+ else if (ConvertStringToInteger(nexttok, &ival) == 1) {
+ /* Parameter parses as an integer */
+ kl->type = PROP_INTEGER;
+ kl->pdefault.ival = ival;
+ kl->slop.ival = 0; // Exact match default
+ }
+ else if (ConvertStringToFloat(nexttok, &dval) == 1) {
+ /* Parameter parses as a floating-point number */
+ kl->type = PROP_DOUBLE;
+ kl->pdefault.dval = dval;
+ kl->slop.dval = 0.01; // One percent default
+ }
+ else {
+ /* Treat the parameter as a string */
+ kl->type = PROP_STRING;
kl->pdefault.string = strsave(nexttok);
+ kl->slop.dval = 0.0;
+ }
HashPtrInstall(kl->key, kl, &verilogdefs);
}
else if (match(nexttok, "localparam")) {
@@ -776,9 +1007,23 @@ skip_endmodule:
kl = NewProperty();
kl->key = strsave(nexttok);
kl->idx = 0;
- kl->type = PROP_STRING;
- kl->slop.dval = 0.0;
- kl->pdefault.string = strsave(eqptr + 1);
+ kl->merge = MERGE_NONE;
+
+ if (ConvertStringToInteger(eqptr + 1, &ival) == 1) {
+ kl->type = PROP_INTEGER;
+ kl->slop.ival = 0;
+ kl->pdefault.ival = ival;
+ }
+ else if (ConvertStringToFloat(eqptr + 1, &dval) == 1) {
+ kl->type = PROP_DOUBLE;
+ kl->slop.dval = 0.01;
+ kl->pdefault.dval = dval;
+ }
+ else {
+ kl->type = PROP_STRING;
+ kl->slop.dval = 0.0;
+ kl->pdefault.string = strsave(eqptr + 1);
+ }
HashPtrInstall(nexttok, kl, &verilogparams);
}
}
@@ -802,11 +1047,9 @@ skip_endmodule:
/* Skip to matching `endif */
while (1) {
SkipNewLine(VLOG_DELIMITERS);
- SkipTok(VLOG_DELIMITERS);
+ SkipTokComments(VLOG_DELIMITERS);
if (EndParseFile()) break;
- if (match(nexttok, "//"))
- continue;
- else if (match(nexttok, "`ifdef") || match(nexttok, "`ifndef")) {
+ if (match(nexttok, "`ifdef") || match(nexttok, "`ifndef")) {
nested++;
}
else if (match(nexttok, "`endif")) {
@@ -826,7 +1069,7 @@ skip_endmodule:
if (match(nexttok, "real")) SkipTokNoNewline(VLOG_DELIMITERS);
while (nexttok != NULL) {
/* Handle bus notation */
- if (GetBus(nexttok, &wb) == 0) {
+ if (GetBusTok(&wb) == 0) {
SkipTokNoNewline(VLOG_DELIMITERS);
if (wb.start > wb.end) {
for (i = wb.end; i <= wb.start; i++) {
@@ -895,115 +1138,131 @@ skip_endmodule:
head = NULL;
tail = NULL;
- SkipTok(VLOG_DELIMITERS);
+ SkipTokComments(VLOG_DELIMITERS);
- // Next token must be '#(' (parameters) or '(' (pin list)
+ // Next token must be '#(' (parameters) or an instance name
- if (!strcmp(nexttok, "#(")) {
+ if (match(nexttok, "#(")) {
// Read the parameter list
+ SkipTokComments(VLOG_DELIMITERS);
while (nexttok != NULL) {
char *paramname;
- SkipTok(VLOG_DELIMITERS2);
- while (match(nexttok, "//")) {
- SkipNewLine(VLOG_DELIMITERS);
- SkipTok(VLOG_DELIMITERS2);
- }
- if (!strcasecmp(nexttok, ";")) {
- SkipTok(VLOG_DELIMITERS);
+ if (match(nexttok, ")")) {
+ SkipTokComments(VLOG_DELIMITERS);
break;
}
+ else if (match(nexttok, ",")) {
+ SkipTokComments(VLOG_DELIMITERS);
+ continue;
+ }
// We need to look for parameters of the type ".name(value)"
- if (nexttok[0] != '.') break;
- else {
+ else if (nexttok[0] == '.') {
paramname = strsave(nexttok + 1);
- SkipTok(VLOG_DELIMITERS2);
- while (match(nexttok, "//")) {
- SkipNewLine(VLOG_DELIMITERS);
- SkipTok(VLOG_DELIMITERS2);
+ SkipTokComments(VLOG_DELIMITERS);
+ if (!match(nexttok, "(")) {
+ Printf("Error: Expecting parameter value, got %s.\n", nexttok);
+ }
+ SkipTokComments(VLOG_DELIMITERS);
+ if (match(nexttok, ")")) {
+ Printf("Error: Parameter with no value found.\n");
+ }
+ else {
+ AddProperty(&kvlist, paramname, nexttok);
+ SkipTokComments(VLOG_DELIMITERS);
+ if (!match(nexttok, ")")) {
+ Printf("Error: Expecting end of parameter value, "
+ "got %s.\n", nexttok);
+ }
}
- AddProperty(&kvlist, paramname, nexttok);
FREE(paramname);
}
+ SkipTokComments(VLOG_DELIMITERS);
+ }
+ if (!nexttok) {
+ Printf("Error: Still reading module, but got end-of-file.\n");
+ goto skip_endmodule;
}
}
- // Catch instance name followed by open parenthesis with no space
- if ((parptr = strchr(nexttok, '(')) != NULL) *parptr = '\0';
-
- // Then comes the instance name
strncpy(instancename, nexttok, 99);
- if (!parptr)
- SkipTok(VLOG_DELIMITERS);
- else {
- *parptr = '(';
- nexttok = parptr;
- }
/* Printf("Diagnostic: new instance is %s\n", instancename); */
- while (match(nexttok, "//")) {
- SkipNewLine(VLOG_DELIMITERS);
- SkipTok(VLOG_DELIMITERS);
- }
+ SkipTokComments(VLOG_DELIMITERS);
arraystart = arrayend = -1;
- if (nexttok[0] == '[') {
+ if (match(nexttok, "[")) {
// Handle instance array notation.
struct bus wb;
- if (GetBus(nexttok, &wb) == 0) {
+ if (GetBusTok(&wb) == 0) {
arraystart = wb.start;
arrayend = wb.end;
}
- SkipTok(VLOG_DELIMITERS);
+ SkipTokComments(VLOG_DELIMITERS);
}
- if (nexttok[0] == '(') {
+ if (match(nexttok, "(")) {
char savetok = (char)0;
struct portelement *new_port;
- // Note that the open parens does not necessarily have to be
- // followed by space.
- if (nexttok[1] != '\0') {
- nexttok++;
- savetok = (char)1;
- }
-
// Read the pin list
while (nexttok != NULL) {
- if (savetok == (char)0) SkipTok(VLOG_DELIMITERS2);
- savetok = (char)0;
+ SkipTokComments(VLOG_DELIMITERS);
// NOTE: Deal with `ifdef et al. properly. Ignoring for now.
- while (match(nexttok, "//") || (nexttok[0] == '`')) {
+ while (nexttok[0] == '`') {
SkipNewLine(VLOG_DELIMITERS);
- SkipTok(VLOG_DELIMITERS2);
+ SkipTokComments(VLOG_DELIMITERS);
}
- if (!strcasecmp(nexttok, ";")) break;
+ if (match(nexttok, ")")) break;
+ else if (match(nexttok, ",")) continue;
// We need to look for pins of the type ".name(value)"
if (nexttok[0] != '.') {
Printf("Badly formed subcircuit pin line at \"%s\"\n", nexttok);
+ SkipNewLine(VLOG_DELIMITERS);
}
else {
new_port = (struct portelement *)CALLOC(1, sizeof(struct portelement));
new_port->name = strsave(nexttok + 1);
- SkipTok(VLOG_DELIMITERS2);
- while (match(nexttok, "//")) {
- SkipNewLine(VLOG_DELIMITERS);
- SkipTok(VLOG_DELIMITERS2);
+ SkipTokComments(VLOG_DELIMITERS);
+ if (!match(nexttok, "(")) {
+ Printf("Badly formed subcircuit pin line at \"%s\"\n", nexttok);
+ SkipNewLine(VLOG_DELIMITERS);
}
- if (match(nexttok, ";") || (nexttok[0] == '.')) {
+ SkipTokComments(VLOG_PIN_NAME_DELIMITERS);
+ if (match(nexttok, ")")) {
char localnet[100];
// Empty parens, so create a new local node
savetok = (char)1;
sprintf(localnet, "_noconnect_%d_", localcount++);
new_port->net = strsave(localnet);
}
- else
+ else {
new_port->net = strsave(nexttok);
+ /* Read array information along with name; will be parsed later */
+ SkipTokComments(VLOG_DELIMITERS);
+ if (match(nexttok, "[")) {
+ /* Check for space between name and array identifier */
+ SkipTokComments(VLOG_PIN_NAME_DELIMITERS);
+ if (!match(nexttok, ")")) {
+ char *expnet;
+ expnet = (char *)MALLOC(strlen(new_port->net)
+ + strlen(nexttok) + 2);
+ sprintf(expnet, "%s[%s", new_port->net, nexttok);
+ FREE(new_port->net);
+ new_port->net = expnet;
+ }
+ SkipTokComments(VLOG_DELIMITERS);
+ }
+ if (!match(nexttok, ")")) {
+ Printf("Badly formed subcircuit pin line at \"%s\"\n", nexttok);
+ SkipNewLine(VLOG_DELIMITERS);
+ }
+ }
if (head == NULL) head = new_port;
else tail->next = new_port;
@@ -1013,13 +1272,12 @@ skip_endmodule:
}
}
else {
- // There are too many statements in too many variants of verilog
- // to track them all, let alone dealing with macro substitutions
- // and such. If it doesn't look like a circuit instance and isn't
- // otherwise handled above, treat as a non-structural statement
- // and recast the device class as a black-box module.
- SetClass(CLASS_MODULE);
- goto skip_endmodule;
+ Printf("Expected to find instance pin block but got \"%s\"\n", nexttok);
+ }
+ /* Instance should end with a semicolon */
+ SkipTokComments(VLOG_DELIMITERS);
+ if (!match(nexttok, ";")) {
+ Printf("Expected to find end of instance but got \"%s\"\n", nexttok);
}
/* Check for ignored class */
@@ -1131,9 +1389,61 @@ skip_endmodule:
struct bus wb;
struct portelement *new_port;
char vname[256];
- int j;
+ int j, result;
+ struct objlist *bobj;
+ char *bptr;
+ int minnet, maxnet, testidx;
+
+ result = GetBus(scan->net, &wb);
+ if (result == -1) {
+ /* CHECK: THIS CODE SHOULD BE DELETED, IT IS NOT THE ISSUE */
+ /* Not bus notation, but check if signal was defined as a bus */
+ wb.start = wb.end = -1;
+ minnet = maxnet = -1;
+
+ /* Pins should be in index order start->end. Other nodes */
+ /* should be in order start->end by node number. */
+
+ for (bobj = CurrentCell->cell; bobj; bobj = bobj->next) {
+ if (bobj->type == PORT) {
+ if ((bptr = strchr(bobj->name, '[')) != NULL) {
+ *bptr = '\0';
+ if (!strcmp(bobj->name, scan->net)) {
+ *bptr = '[';
+ if (wb.start == -1)
+ sscanf(bptr + 1, "%d", &wb.start);
+ else
+ sscanf(bptr + 1, "%d", &wb.end);
+ }
+ }
+ }
+ else if (bobj->type == NODE) {
+ if ((bptr = strchr(bobj->name, '[')) != NULL) {
+ *bptr = '\0';
+ if (!strcmp(bobj->name, scan->net)) {
+ if (sscanf(bptr + 1, "%d", &testidx) == 1) {
+ if (minnet == -1) {
+ minnet = maxnet = bobj->node;
+ wb.start = wb.end = testidx;
+ }
+ else if (bobj->node < minnet) {
+ minnet = bobj->node;
+ wb.start = testidx;
+ }
+ else if (bobj->node > maxnet) {
+ maxnet = bobj->node;
+ wb.end = testidx;
+ }
+ }
+ }
+ *bptr = '[';
+ }
+ }
+ }
+ if (wb.start != -1) result = 0;
+ }
- if (GetBus(scan->net, &wb) == 0) {
+ if (result == 0) {
if (((wb.start - wb.end) != (portstart - portend)) &&
((wb.start - wb.end) != (portend - portstart))) {
if (((wb.start - wb.end) != (arraystart - arrayend)) &&
@@ -1362,11 +1672,12 @@ char *ReadVerilogTop(char *fname, int *fnum, int blackbox)
/* Add the pre-defined key "LVS" to verilogdefs */
kl = NewProperty();
+ kl->merge = MERGE_NONE;
kl->key = strsave("LVS");
kl->idx = 0;
- kl->type = PROP_STRING;
- kl->slop.dval = 0.0;
- kl->pdefault.string = strsave("1");
+ kl->type = PROP_INTEGER;
+ kl->slop.ival = 0;
+ kl->pdefault.ival = 1;
HashPtrInstall(kl->key, kl, &verilogdefs);
/* All verilog files should start with a comment line, */
diff --git a/doc/Makefile b/doc/Makefile
index cd06b2d..bef3c29 100644
--- a/doc/Makefile
+++ b/doc/Makefile
@@ -8,9 +8,9 @@ DOCDIRS = $(DESTDIR)${DOCDIR}
MANFILES =
DOCFILES = $(DESTDIR)${DOCDIR}/netgen.doc
-install-tcl: ${MANDIRS} ${MANFILES} ${DOCDIRS} ${DOCFILES}
+install-tcl: ${DOCDIRS} ${DOCFILES}
-install: ${MANDIRS} ${MANFILES} ${DOCDIRS} ${DOCFILES}
+install: ${DOCDIRS} ${DOCFILES}
${MANDIRS}: make-man-dirs
diff --git a/scripts/configure b/scripts/configure
index e4e1a0d..c6d171b 100755
--- a/scripts/configure
+++ b/scripts/configure
@@ -7779,7 +7779,9 @@ else
fi
${ECHO_N} "Python3: "
-if test "x${HAVE_PYTHON3}" == "x"; then
+if test "${HAVE_PYTHON3}" == "yes"; then
+ echo "yes"
+else
echo "no"
echo
echo " Without Python3, you cannot run the GUI interface to netgen."
@@ -7788,8 +7790,6 @@ if test "x${HAVE_PYTHON3}" == "x"; then
echo " python3 support, make sure that you have installed python3"
echo " on your system."
echo
-else
- echo "yes"
fi
echo "-----------------------------------------------------------"
diff --git a/scripts/configure.in b/scripts/configure.in
index 24080f2..2f951c2 100644
--- a/scripts/configure.in
+++ b/scripts/configure.in
@@ -1319,7 +1319,9 @@ else
fi
${ECHO_N} "Python3: "
-if test "x${HAVE_PYTHON3}" == "x"; then
+if test "${HAVE_PYTHON3}" == "yes"; then
+ echo "yes"
+else
echo "no"
echo
echo " Without Python3, you cannot run the GUI interface to netgen."
@@ -1328,8 +1330,6 @@ if test "x${HAVE_PYTHON3}" == "x"; then
echo " python3 support, make sure that you have installed python3"
echo " on your system."
echo
-else
- echo "yes"
fi
echo "-----------------------------------------------------------"
diff --git a/tcltk/netgen.tcl.in b/tcltk/netgen.tcl.in
index 2b0a9cc..830be5e 100644
--- a/tcltk/netgen.tcl.in
+++ b/tcltk/netgen.tcl.in
@@ -138,7 +138,7 @@ proc netgen::convert_to_json {filename lvs_final} {
foreach net $cktval {
incr nidx
puts $fjson " \["
- set netname [lindex $net 0]
+ set netname [string map {"\\" ""} [lindex $net 0]]
puts $fjson " \"$netname\","
puts $fjson " \["
set netconn [lindex $net 1]
@@ -169,7 +169,7 @@ proc netgen::convert_to_json {filename lvs_final} {
foreach net $cktval {
incr nidx
puts $fjson " \["
- set netname [lindex $net 0]
+ set netname [string map {"\\" ""} [lindex $net 0]]
puts $fjson " \"$netname\","
puts $fjson " \["
set netconn [lindex $net 1]
diff --git a/tcltk/tclnetgen.c b/tcltk/tclnetgen.c
index 6077480..8b21a19 100644
--- a/tcltk/tclnetgen.c
+++ b/tcltk/tclnetgen.c
@@ -3157,19 +3157,25 @@ _netcmp_equate(ClientData clientData,
/* add --- add new property */
/* remove --- delete existing property */
/* tolerance --- set property tolerance */
-/* merge --- set property merge behavior */
+/* merge --- (deprecated) */
/* or */
/* netgen::property default */
/* or */
/* netgen::property <device>|<model> <option> */
/* yes|no */
/* Where <option> is one of: */
-/* serial --- allow/prohibit serial combination */
+/* series --- allow/prohibit series combination */
/* parallel --- allow/prohibit parallel combination */
/* or */
/* netgen::property parallel none */
/* --- prohibit parallel combinations by */
-/* default. */
+/* default (for all devices). */
+/* */
+/* series|parallel options are: */
+/* enable|disable|none|{<key> <combine_option>} */
+/* */
+/* combine options are: */
+/* par|add|par_critical|add_critical */
/* */
/* Formerly: (none) */
/* Results: */
@@ -3189,11 +3195,11 @@ _netcmp_property(ClientData clientData,
char *options[] = {
"add", "create", "remove", "delete", "tolerance", "merge", "serial",
- "parallel", NULL
+ "series", "parallel", NULL
};
enum OptionIdx {
ADD_IDX, CREATE_IDX, REMOVE_IDX, DELETE_IDX, TOLERANCE_IDX, MERGE_IDX,
- SERIAL_IDX, PARALLEL_IDX
+ SERIAL_IDX, SERIES_IDX, PARALLEL_IDX
};
int result, index, idx2;
@@ -3204,16 +3210,31 @@ _netcmp_property(ClientData clientData,
INTEGER_IDX, DOUBLE_IDX, VALUE_IDX, STRING_IDX
};
+ /* Note: "merge" has been deprecated, but kept for backwards compatibility. */
+ /* It has been replaced by "combineoptions" below, used with "series" and */
+ /* "parallel". */
+
char *mergeoptions[] = {
"none", "add", "add_critical", "par", "par_critical",
"parallel", "parallel_critical", "ser_critical", "ser",
- "serial_critical", "serial", NULL
+ "serial_critical", "series_critical", "serial", "series", NULL
};
+
enum MergeOptionIdx {
NONE_IDX, ADD_ONLY_IDX, ADD_CRIT_IDX,
PAR_ONLY_IDX, PAR_CRIT_IDX, PAR2_ONLY_IDX, PAR2_CRIT_IDX,
- SER_CRIT_IDX, SER_IDX, SER2_CRIT_IDX, SER2_IDX
+ SER_CRIT_IDX, SER_IDX, SER2_CRIT_IDX, SER3_CRIT_IDX, SER2_IDX, SER3_IDX
+ };
+
+ char *combineoptions[] = {
+ "none", "par", "add", "par_critical", "add_critical", NULL
+ };
+
+ enum CombineOptionIdx {
+ COMB_NONE_IDX, COMB_PAR_IDX, COMB_ADD_IDX, COMB_PAR_CRITICAL_IDX,
+ COMB_ADD_CRITICAL_IDX
};
+
char *yesno[] = {
"on", "yes", "true", "enable", "allow",
"off", "no", "false", "disable", "prohibit", NULL
@@ -3238,25 +3259,34 @@ _netcmp_property(ClientData clientData,
case CLASS_NMOS: case CLASS_PMOS: case CLASS_FET3:
case CLASS_NMOS4: case CLASS_PMOS4: case CLASS_FET4:
case CLASS_FET:
- PropertyMerge(tp->name, tp->file, "w", MERGE_ADD_CRIT);
+ PropertyMerge(tp->name, tp->file, "w", MERGE_P_ADD | MERGE_P_CRIT,
+ MERGE_ALL_MASK);
PropertyDelete(tp->name, tp->file, "as");
PropertyDelete(tp->name, tp->file, "ad");
PropertyDelete(tp->name, tp->file, "ps");
PropertyDelete(tp->name, tp->file, "pd");
break;
case CLASS_RES: case CLASS_RES3:
- PropertyMerge(tp->name, tp->file, "w", MERGE_ADD_CRIT);
- PropertyMerge(tp->name, tp->file, "l", MERGE_SER_CRIT);
- tp->flags |= COMB_SERIAL;
+ PropertyMerge(tp->name, tp->file, "w",
+ MERGE_P_PAR | MERGE_P_CRIT, MERGE_ALL_MASK);
+ PropertyMerge(tp->name, tp->file, "l",
+ MERGE_S_ADD | MERGE_S_CRIT, MERGE_ALL_MASK);
+ PropertyMerge(tp->name, tp->file, "value",
+ MERGE_S_ADD | MERGE_P_PAR, MERGE_ALL_MASK);
+ tp->flags |= COMB_SERIES;
break;
case CLASS_CAP: case CLASS_ECAP: case CLASS_CAP3:
// NOTE: No attempt to combine area, width, or length;
// only value.
- PropertyMerge(tp->name, tp->file, "value", MERGE_ADD_CRIT);
+ PropertyMerge(tp->name, tp->file, "value",
+ MERGE_P_ADD | MERGE_P_CRIT |
+ MERGE_S_PAR | MERGE_S_CRIT, MERGE_ALL_MASK);
break;
case CLASS_INDUCTOR:
- PropertyMerge(tp->name, tp->file, "value", MERGE_PAR_CRIT);
- tp->flags |= COMB_SERIAL;
+ PropertyMerge(tp->name, tp->file, "value",
+ MERGE_P_PAR | MERGE_P_CRIT |
+ MERGE_S_PAR | MERGE_S_CRIT, MERGE_ALL_MASK);
+ tp->flags |= COMB_SERIES;
break;
}
tp = NextCell();
@@ -3274,7 +3304,22 @@ _netcmp_property(ClientData clientData,
}
else {
Tcl_SetResult(interp, "Bad option, should be property parallel none|all",
- NONE);
+ NULL);
+ return TCL_ERROR;
+ }
+ return TCL_OK;
+ }
+ else if ((objc == 3) && ((!strcmp(Tcl_GetString(objv[1]), "series")) ||
+ (!strcmp(Tcl_GetString(objv[1]), "serial")))) {
+ if (!strcmp(Tcl_GetString(objv[2]), "none")) {
+ SetSeriesCombine(FALSE);
+ }
+ else if (!strcmp(Tcl_GetString(objv[2]), "all")) {
+ SetSeriesCombine(TRUE);
+ }
+ else {
+ Tcl_SetResult(interp, "Bad option, should be property series none|all",
+ NULL);
return TCL_ERROR;
}
return TCL_OK;
@@ -3329,10 +3374,11 @@ _netcmp_property(ClientData clientData,
switch (index) {
case SERIAL_IDX:
+ case SERIES_IDX:
case PARALLEL_IDX:
if (objc == 3) {
- if (index == SERIAL_IDX) {
- tobj1 = Tcl_NewBooleanObj((tp->flags & COMB_SERIAL) ? 1 : 0);
+ if (index == SERIAL_IDX || index == SERIES_IDX) {
+ tobj1 = Tcl_NewBooleanObj((tp->flags & COMB_SERIES) ? 1 : 0);
Tcl_SetObjResult(interp, tobj1);
return TCL_OK;
}
@@ -3342,29 +3388,106 @@ _netcmp_property(ClientData clientData,
return TCL_OK;
}
}
- else if (objc == 4) {
- if (Tcl_GetIndexFromObj(interp, objv[3],
+ else if (objc < 4) {
+ Tcl_WrongNumArgs(interp, 2, objv, "series|parallel enable|disable");
+ return TCL_ERROR;
+ }
+
+ for (i = 3; i < objc; i++) {
+ // Each value must be a list of two, or a yes/no answer.
+
+ if (Tcl_GetIndexFromObj(interp, objv[i],
(CONST84 char **)yesno,
- "combine", 0, &idx2) != TCL_OK) {
- Tcl_WrongNumArgs(interp, 3, objv, "enable|disable");
- return TCL_ERROR;
- }
- if (idx2 <= 4) { /* true, enable, etc. */
- if (index == SERIAL_IDX)
- tp->flags |= COMB_SERIAL;
- else
- tp->flags &= ~COMB_NO_PARALLEL;
+ "combine", 0, &idx2) == TCL_OK) {
+ if (idx2 <= 4) { /* true, enable, etc. */
+ if (index == SERIAL_IDX || index == SERIES_IDX)
+ tp->flags |= COMB_SERIES;
+ else
+ tp->flags &= ~COMB_NO_PARALLEL;
+ }
+ else { /* false, disable, etc. */
+ if (index == SERIAL_IDX || index == SERIES_IDX)
+ tp->flags &= ~COMB_SERIES;
+ else
+ tp->flags |= COMB_NO_PARALLEL;
+ }
+ continue;
}
- else { /* false, disable, etc. */
- if (index == SERIAL_IDX)
- tp->flags &= ~COMB_SERIAL;
- else
- tp->flags |= COMB_NO_PARALLEL;
+
+ result = Tcl_ListObjLength(interp, objv[i], &llen);
+ if ((result != TCL_OK) || (llen != 2)) {
+ Tcl_SetResult(interp, "Not a {key merge_type} pair list.",
+ NULL);
+ }
+ else {
+ int mergeval = MERGE_NONE;
+ int mergemask = MERGE_NONE;
+
+ result = Tcl_ListObjIndex(interp, objv[i], 0, &tobj1);
+ if (result != TCL_OK) return result;
+ result = Tcl_ListObjIndex(interp, objv[i], 1, &tobj2);
+ if (result != TCL_OK) return result;
+
+ result = Tcl_GetIndexFromObj(interp, tobj2,
+ (CONST84 char **)combineoptions,
+ "combine_type", 0, &idx2);
+ if (result != TCL_OK) return result;
+
+ if (index == SERIAL_IDX || index == SERIES_IDX) {
+ mergemask = MERGE_S_MASK;
+ switch (idx2) {
+ case COMB_NONE_IDX:
+ mergeval &= ~(MERGE_S_ADD | MERGE_S_PAR
+ | MERGE_S_CRIT);
+ tp->flags &= ~COMB_SERIES;
+ break;
+ case COMB_PAR_IDX:
+ mergeval = MERGE_S_PAR;
+ tp->flags |= COMB_SERIES;
+ break;
+ case COMB_ADD_IDX:
+ mergeval |= MERGE_S_ADD;
+ tp->flags |= COMB_SERIES;
+ break;
+ case COMB_PAR_CRITICAL_IDX:
+ mergeval |= (MERGE_S_PAR | MERGE_S_CRIT);
+ tp->flags |= COMB_SERIES;
+ break;
+ case COMB_ADD_CRITICAL_IDX:
+ mergeval |= (MERGE_S_ADD | MERGE_S_CRIT);
+ tp->flags |= COMB_SERIES;
+ break;
+ }
+ }
+ else { /* index == PARALLEL_IDX */
+ mergemask = MERGE_P_MASK;
+ switch (idx2) {
+ case COMB_NONE_IDX:
+ mergeval &= ~(MERGE_P_ADD | MERGE_P_PAR
+ | MERGE_P_CRIT);
+ tp->flags |= COMB_NO_PARALLEL;
+ break;
+ case COMB_PAR_IDX:
+ mergeval |= MERGE_P_PAR;
+ tp->flags &= ~COMB_NO_PARALLEL;
+ break;
+ case COMB_ADD_IDX:
+ mergeval |= MERGE_P_ADD;
+ tp->flags &= ~COMB_NO_PARALLEL;
+ break;
+ case COMB_PAR_CRITICAL_IDX:
+ mergeval |= (MERGE_P_PAR | MERGE_P_CRIT);
+ tp->flags &= ~COMB_NO_PARALLEL;
+ break;
+ case COMB_ADD_CRITICAL_IDX:
+ mergeval |= (MERGE_P_ADD | MERGE_P_CRIT);
+ tp->flags &= ~COMB_NO_PARALLEL;
+ break;
+ }
+ }
+ PropertyMerge(tp->name, fnum, Tcl_GetString(tobj1), mergeval,
+ mergemask);
}
- }
- else {
- Tcl_WrongNumArgs(interp, 2, objv, "serial|parallel enable|disable");
- return TCL_ERROR;
}
break;
@@ -3535,6 +3658,11 @@ _netcmp_property(ClientData clientData,
break;
case MERGE_IDX:
+ // NOTE: This command option is deprecated, kept for backwards
+ // compatibility, with updated flag values. This command format
+ // is unable to specify a property as being a critical property
+ // for merging both in series and in parallel.
+
if (objc == 3) {
Tcl_WrongNumArgs(interp, 1, objv, "{property_key merge_type} ...");
return TCL_ERROR;
@@ -3564,29 +3692,32 @@ _netcmp_property(ClientData clientData,
mergeval = MERGE_NONE;
break;
case ADD_ONLY_IDX:
- mergeval = MERGE_ADD;
+ mergeval = MERGE_P_ADD;
break;
case ADD_CRIT_IDX:
- mergeval = MERGE_ADD_CRIT;
+ mergeval = MERGE_P_ADD | MERGE_P_CRIT;
break;
case PAR_ONLY_IDX:
case PAR2_ONLY_IDX:
- mergeval = MERGE_PAR;
+ mergeval = MERGE_P_PAR;
break;
case PAR_CRIT_IDX:
case PAR2_CRIT_IDX:
- mergeval = MERGE_PAR_CRIT;
+ mergeval = MERGE_P_PAR | MERGE_P_CRIT;
break;
case SER_CRIT_IDX:
case SER2_CRIT_IDX:
- mergeval = MERGE_SER_CRIT;
+ case SER3_CRIT_IDX:
+ mergeval = MERGE_S_ADD | MERGE_S_CRIT;
break;
case SER_IDX:
case SER2_IDX:
- mergeval = MERGE_SER;
+ case SER3_IDX:
+ mergeval = MERGE_S_ADD;
break;
}
- PropertyMerge(tp->name, fnum, Tcl_GetString(tobj1), mergeval);
+ PropertyMerge(tp->name, fnum, Tcl_GetString(tobj1), mergeval,
+ MERGE_ALL_MASK);
}
}
break;
diff --git a/tcltk/tmp.out b/tcltk/tmp.out
new file mode 100644
index 0000000..b0c8be9
--- /dev/null
+++ b/tcltk/tmp.out
@@ -0,0 +1,4405 @@
+*SPEF "IEEE 1481.1999"
+*DESIGN "map9v3"
+*DATE "08:50:32 Thursday October 04, 2018"
+*VENDOR "unknown"
+*PROGRAM "qrouter"
+*VERSION "unknown"
+*DESIGN_FLOW "qflow"
+*DIVIDER /
+*DELIMITER :
+*BUS_DELIMITER __
+*T_UNIT 1 PS
+*C_UNIT 1 FF
+*R_UNIT 1 OHM
+*L_UNIT 1 HENRY
+
+*NAME_MAP
+*1 _91__test
+*2 INVX4_1:Y
+*3 OAI21X1_21:C
+*4 NAND3X1_10:A
+*5 NAND2X1_1:A
+*6 NAND3X1_2:B
+*7 OAI21X1_5:C
+*8 OAI21X1_6:C
+*9 OAI21X1_7:C
+*10 OAI21X1_8:C
+*11 OAI21X1_9:C
+*12 OAI21X1_28:C
+*13 OAI21X1_10:C
+*14 OAI21X1_4:C
+*15 OAI21X1_12:A
+*16 OAI21X1_11:C
+*17 OAI21X1_14:C
+*18 AOI21X1_10:C
+*19 state_state_0_
+*20 DFFSR_1:Q
+*21 AOI22X1_1:A
+*22 OAI21X1_18:C
+*23 OAI21X1_16:A
+*24 OAI21X1_13:C
+*25 AOI21X1_11:C
+*26 OAI22X1_1:C
+*27 OAI21X1_25:A
+*28 OAI21X1_23:C
+*29 NAND3X1_8:A
+*30 INVX4_1:A
+*31 AOI21X1_13:C
+*32 NAND2X1_7:A
+*33 _103_
+*34 NAND3X1_2:Y
+*35 MUX2X1_2:S
+*36 MUX2X1_6:S
+*37 MUX2X1_1:S
+*38 MUX2X1_7:S
+*39 AOI21X1_1:B
+*40 NOR2X1_4:B
+*41 NOR2X1_5:B
+*42 AOI21X1_2:B
+*43 MUX2X1_3:S
+*44 MUX2X1_4:S
+*45 MUX2X1_5:S
+*46 clock_bF_buf4
+*47 CLKBUF1_1:Y
+*48 DFFSR_30:CLK
+*49 DFFSR_6:CLK
+*50 DFFSR_31:CLK
+*51 DFFSR_24:CLK
+*52 DFFSR_14:CLK
+*53 DFFSR_7:CLK
+*54 DFFSR_8:CLK
+*55 clock_bF_buf3
+*56 CLKBUF1_2:Y
+*57 DFFSR_26:CLK
+*58 DFFSR_27:CLK
+*59 DFFSR_28:CLK
+*60 DFFSR_29:CLK
+*61 DFFSR_10:CLK
+*62 DFFSR_11:CLK
+*63 DFFSR_12:CLK
+*64 _48__bF_buf4
+*65 BUFX4_1:Y
+*66 DFFSR_9:R
+*67 DFFSR_15:R
+*68 DFFSR_22:R
+*69 DFFSR_23:R
+*70 DFFSR_21:R
+*71 DFFSR_5:R
+*72 DFFSR_3:R
+*73 _48__bF_buf3
+*74 BUFX4_2:Y
+*75 DFFSR_25:R
+*76 DFFSR_2:R
+*77 DFFSR_13:R
+*78 DFFSR_30:R
+*79 DFFSR_32:R
+*80 DFFSR_8:R
+*81 DFFSR_16:R
+*82 state_3_
+*83 DFFSR_4:Q
+*84 NAND3X1_3:A
+*85 NAND3X1_9:A
+*86 AOI22X1_2:A
+*87 OAI21X1_1:C
+*88 INVX8_1:A
+*89 OAI21X1_3:C
+*90 OAI21X1_4:A
+*91 clock_bF_buf2
+*92 CLKBUF1_3:Y
+*93 DFFSR_13:CLK
+*94 DFFSR_2:CLK
+*95 DFFSR_25:CLK
+*96 DFFSR_32:CLK
+*97 DFFSR_17:CLK
+*98 DFFSR_16:CLK
+*99 clock_bF_buf1
+*100 CLKBUF1_4:Y
+*101 DFFSR_15:CLK
+*102 DFFSR_23:CLK
+*103 DFFSR_22:CLK
+*104 DFFSR_21:CLK
+*105 DFFSR_9:CLK
+*106 DFFSR_3:CLK
+*107 clock_bF_buf0
+*108 CLKBUF1_5:Y
+*109 DFFSR_5:CLK
+*110 DFFSR_4:CLK
+*111 DFFSR_20:CLK
+*112 DFFSR_19:CLK
+*113 DFFSR_18:CLK
+*114 DFFSR_1:CLK
+*115 _48__bF_buf2
+*116 BUFX4_3:Y
+*117 DFFSR_29:R
+*118 DFFSR_6:R
+*119 DFFSR_31:R
+*120 DFFSR_24:R
+*121 DFFSR_14:R
+*122 DFFSR_7:R
+*123 _48__bF_buf1
+*124 BUFX4_4:Y
+*125 DFFSR_27:R
+*126 DFFSR_26:R
+*127 DFFSR_28:R
+*128 DFFSR_10:R
+*129 DFFSR_11:R
+*130 DFFSR_12:R
+*131 _48__bF_buf0
+*132 BUFX4_5:Y
+*133 DFFSR_1:S
+*134 DFFSR_17:R
+*135 DFFSR_18:R
+*136 DFFSR_19:R
+*137 DFFSR_20:R
+*138 DFFSR_4:R
+*139 clock
+*140 CLKBUF1_4:A
+*141 CLKBUF1_5:A
+*142 CLKBUF1_3:A
+*143 CLKBUF1_2:A
+*144 CLKBUF1_1:A
+*145 _48_
+*146 INVX8_2:Y
+*147 BUFX4_4:A
+*148 BUFX4_1:A
+*149 BUFX4_3:A
+*150 BUFX4_2:A
+*151 BUFX4_5:A
+*152 _102__bF_buf3
+*153 BUFX4_6:Y
+*154 AOI21X1_8:A
+*155 AOI21X1_14:A
+*156 OAI21X1_28:B
+*157 OAI21X1_10:B
+*158 AOI21X1_9:A
+*159 _102__bF_buf2
+*160 BUFX4_7:Y
+*161 OAI21X1_7:B
+*162 AOI21X1_6:A
+*163 OAI21X1_9:B
+*164 OAI21X1_8:B
+*165 AOI21X1_7:A
+*166 _102__bF_buf1
+*167 BUFX4_8:Y
+*168 NAND3X1_2:C
+*169 NAND3X1_11:B
+*170 OAI21X1_27:A
+*171 AND2X2_1:A
+*172 NOR2X1_7:B
+*173 _111__5_
+*174 DFFSR_21:Q
+*175 BUFX2_6:A
+*176 INVX1_28:A
+*177 NOR3X1_2:A
+*178 NOR3X1_1:A
+*179 OAI21X1_20:C
+*180 _111__4_
+*181 DFFSR_20:Q
+*182 NOR3X1_1:B
+*183 NOR3X1_2:B
+*184 INVX2_2:A
+*185 BUFX2_5:A
+*186 OAI21X1_20:A
+*187 _49_
+*188 NAND3X1_3:Y
+*189 XNOR2X1_4:A
+*190 AOI22X1_1:C
+*191 NOR3X1_2:C
+*192 OAI21X1_20:B
+*193 INVX1_30:A
+*194 _102_
+*195 INVX8_1:Y
+*196 BUFX4_9:A
+*197 BUFX4_7:A
+*198 BUFX4_6:A
+*199 BUFX4_8:A
+*200 _102__bF_buf0
+*201 BUFX4_9:Y
+*202 OAI21X1_5:B
+*203 AOI21X1_4:A
+*204 OAI21X1_6:B
+*205 AOI21X1_5:A
+*206 _111__2_
+*207 DFFSR_18:Q
+*208 XNOR2X1_3:B
+*209 INVX1_22:A
+*210 BUFX2_3:A
+*211 NOR2X1_1:B
+*212 _111__0_
+*213 DFFSR_16:Q
+*214 BUFX2_1:A
+*215 AND2X2_1:B
+*216 NOR2X1_7:A
+*217 NOR2X1_2:B
+*218 _111__6_
+*219 DFFSR_22:Q
+*220 BUFX2_7:A
+*221 AOI22X1_2:C
+*222 INVX1_29:A
+*223 NOR3X1_1:C
+*224 _111__7_
+*225 DFFSR_23:Q
+*226 BUFX2_8:A
+*227 INVX1_32:A
+*228 OAI21X1_27:C
+*229 OAI21X1_1:A
+*230 _114__0_
+*231 DFFSR_24:Q
+*232 BUFX2_19:A
+*233 NOR2X1_4:A
+*234 OAI21X1_4:B
+*235 OAI21X1_28:A
+*236 _114__3_
+*237 DFFSR_27:Q
+*238 INVX1_10:A
+*239 BUFX2_22:A
+*240 OAI21X1_7:A
+*241 XNOR2X1_2:A
+*242 _114__4_
+*243 DFFSR_28:Q
+*244 INVX1_12:A
+*245 OAI21X1_8:A
+*246 XNOR2X1_2:B
+*247 BUFX2_23:A
+*248 _114__5_
+*249 DFFSR_29:Q
+*250 OAI21X1_9:A
+*251 INVX1_14:A
+*252 XNOR2X1_1:A
+*253 BUFX2_24:A
+*254 _34_
+*255 NAND2X1_2:Y
+*256 INVX2_1:A
+*257 NAND2X1_4:A
+*258 AOI21X1_12:B
+*259 NAND3X1_4:A
+*260 _35_
+*261 INVX2_1:Y
+*262 OAI21X1_13:B
+*263 OAI21X1_15:B
+*264 AOI21X1_10:A
+*265 OAI21X1_17:B
+*266 N_3_
+*267 OAI21X1_17:A
+*268 AOI21X1_10:B
+*269 OAI21X1_15:A
+*270 NOR2X1_10:A
+*271 N_5_
+*272 OAI21X1_18:A
+*273 INVX1_23:A
+*274 OAI21X1_19:A
+*275 NOR2X1_11:A
+*276 _111__3_
+*277 DFFSR_19:Q
+*278 NOR2X1_1:A
+*279 AOI21X1_11:B
+*280 BUFX2_4:A
+*281 _92_
+*282 NOR2X1_1:Y
+*283 NAND3X1_3:B
+*284 NAND2X1_8:A
+*285 NAND3X1_1:A
+*286 _111__1_
+*287 DFFSR_17:Q
+*288 BUFX2_2:A
+*289 NOR2X1_2:A
+*290 INVX1_21:A
+*291 _93_
+*292 NOR2X1_2:Y
+*293 NAND3X1_1:B
+*294 NAND2X1_8:B
+*295 NAND3X1_3:C
+*296 state_2_
+*297 DFFSR_3:Q
+*298 NAND3X1_2:A
+*299 INVX1_34:A
+*300 DFFSR_5:D
+*301 _114__1_
+*302 DFFSR_25:Q
+*303 INVX1_6:A
+*304 OAI21X1_5:A
+*305 BUFX2_20:A
+*306 _114__2_
+*307 DFFSR_26:Q
+*308 INVX1_8:A
+*309 BUFX2_21:A
+*310 OAI21X1_6:A
+*311 _114__6_
+*312 DFFSR_30:Q
+*313 OAI21X1_10:A
+*314 INVX1_16:A
+*315 BUFX2_25:A
+*316 _114__7_
+*317 DFFSR_31:Q
+*318 XNOR2X1_1:B
+*319 INVX1_18:A
+*320 BUFX2_26:A
+*321 N_1_
+*322 NAND2X1_2:A
+*323 NOR2X1_8:A
+*324 INVX1_20:A
+*325 _31_
+*326 NOR2X1_7:Y
+*327 OAI21X1_11:A
+*328 NOR2X1_9:B
+*329 AND2X2_2:A
+*330 _38_
+*331 AND2X2_2:Y
+*332 OAI21X1_14:B
+*333 NAND2X1_6:B
+*334 XNOR2X1_3:A
+*335 _44_
+*336 NOR2X1_10:Y
+*337 NAND2X1_4:B
+*338 NAND3X1_4:B
+*339 AOI21X1_12:A
+*340 _45_
+*341 NAND2X1_4:Y
+*342 OAI21X1_19:B
+*343 OAI21X1_18:B
+*344 NAND2X1_5:A
+*345 _56_
+*346 INVX2_2:Y
+*347 NAND3X1_6:B
+*348 NAND3X1_5:B
+*349 XNOR2X1_4:B
+*350 _59_
+*351 NAND3X1_4:Y
+*352 OAI21X1_26:B
+*353 OAI21X1_23:B
+*354 INVX1_24:A
+*355 _60_
+*356 INVX1_24:Y
+*357 NAND3X1_7:C
+*358 OAI21X1_24:B
+*359 OAI21X1_22:A
+*360 N_7_
+*361 OAI21X1_23:A
+*362 INVX1_26:A
+*363 OAI21X1_26:A
+*364 _95_
+*365 NAND3X1_1:Y
+*366 OAI21X1_27:B
+*367 OAI21X1_1:B
+*368 state_1_
+*369 DFFSR_2:Q
+*370 AND2X2_4:B
+*371 INVX1_1:A
+*372 state_4_
+*373 DFFSR_5:Q
+*374 NAND3X1_11:A
+*375 INVX1_2:A
+*376 start
+*377 DFFSR_32:D
+*378 INVX1_3:A
+*379 _100_
+*380 NOR2X1_3:Y
+*381 OAI21X1_2:B
+*382 AND2X2_4:A
+*383 _113__1_
+*384 DFFSR_7:Q
+*385 BUFX2_11:A
+*386 INVX1_4:A
+*387 _113__2_
+*388 DFFSR_8:Q
+*389 BUFX2_12:A
+*390 INVX1_5:A
+*391 _106_
+*392 INVX1_6:Y
+*393 MUX2X1_1:B
+*394 AOI21X1_14:B
+*395 _113__3_
+*396 DFFSR_9:Q
+*397 BUFX2_13:A
+*398 INVX1_7:A
+*399 _108_
+*400 INVX1_8:Y
+*401 MUX2X1_2:B
+*402 AOI21X1_4:B
+*403 _113__4_
+*404 DFFSR_10:Q
+*405 BUFX2_14:A
+*406 INVX1_9:A
+*407 _110_
+*408 INVX1_10:Y
+*409 MUX2X1_3:B
+*410 AOI21X1_5:B
+*411 _113__5_
+*412 DFFSR_11:Q
+*413 BUFX2_15:A
+*414 INVX1_11:A
+*415 _9_
+*416 INVX1_12:Y
+*417 MUX2X1_4:B
+*418 AOI21X1_6:B
+*419 _113__6_
+*420 DFFSR_12:Q
+*421 BUFX2_16:A
+*422 INVX1_13:A
+*423 _11_
+*424 INVX1_14:Y
+*425 AOI21X1_7:B
+*426 MUX2X1_5:B
+*427 _113__7_
+*428 DFFSR_13:Q
+*429 INVX1_15:A
+*430 BUFX2_17:A
+*431 _13_
+*432 INVX1_16:Y
+*433 AOI21X1_8:B
+*434 MUX2X1_6:B
+*435 _113__8_
+*436 DFFSR_14:Q
+*437 INVX1_17:A
+*438 BUFX2_18:A
+*439 _15_
+*440 INVX1_18:Y
+*441 AOI21X1_9:B
+*442 MUX2X1_7:B
+*443 _113__0_
+*444 DFFSR_6:Q
+*445 BUFX2_10:A
+*446 INVX1_19:A
+*447 _18_
+*448 XNOR2X1_1:Y
+*449 AOI21X1_3:A
+*450 OAI21X1_3:A
+*451 _19_
+*452 XNOR2X1_2:Y
+*453 OAI21X1_3:B
+*454 AOI21X1_3:B
+*455 N_2_
+*456 NAND2X1_2:B
+*457 NOR2X1_8:B
+*458 _37_
+*459 INVX1_21:Y
+*460 AND2X2_2:B
+*461 NOR2X1_9:A
+*462 N_4_
+*463 OAI21X1_17:C
+*464 NOR2X1_10:B
+*465 N_6_
+*466 NOR2X1_11:B
+*467 OAI21X1_19:C
+*468 _67_
+*469 INVX1_26:Y
+*470 NAND3X1_7:A
+*471 OAI21X1_24:A
+*472 _72_
+*473 INVX1_28:Y
+*474 NAND3X1_6:A
+*475 NAND3X1_5:A
+*476 _75_
+*477 NOR2X1_12:Y
+*478 NAND3X1_9:C
+*479 AOI22X1_2:B
+*480 N_8_
+*481 INVX1_31:A
+*482 NAND3X1_7:B
+*483 _84_
+*484 NAND3X1_9:Y
+*485 NAND3X1_10:C
+*486 INVX1_35:A
+*487 _112_
+*488 DFFSR_15:Q
+*489 INVX1_33:A
+*490 BUFX2_9:A
+*491 _94_
+*492 NOR3X1_1:Y
+*493 NAND3X1_1:C
+*494 _96_
+*495 OAI21X1_1:Y
+*496 NAND2X1_1:B
+*497 _6_
+*498 NAND2X1_1:Y
+*499 DFFSR_4:D
+*500 _97_
+*501 INVX1_1:Y
+*502 OAI21X1_2:A
+*503 _98_
+*504 INVX1_2:Y
+*505 OAI21X1_2:C
+*506 _99_
+*507 INVX1_3:Y
+*508 NOR2X1_3:B
+*509 startbuf
+*510 DFFSR_32:Q
+*511 NOR2X1_3:A
+*512 _7_
+*513 OAI21X1_2:Y
+*514 DFFSR_2:D
+*515 _101_
+*516 INVX1_4:Y
+*517 AOI21X1_1:A
+*518 _104_
+*519 NOR2X1_4:Y
+*520 AOI21X1_1:C
+*521 _2__1_
+*522 AOI21X1_1:Y
+*523 DFFSR_7:D
+*524 _105_
+*525 INVX1_5:Y
+*526 MUX2X1_1:A
+*527 _2__2_
+*528 MUX2X1_1:Y
+*529 DFFSR_8:D
+*530 _107_
+*531 INVX1_7:Y
+*532 MUX2X1_2:A
+*533 _2__3_
+*534 MUX2X1_2:Y
+*535 DFFSR_9:D
+*536 _109_
+*537 INVX1_9:Y
+*538 MUX2X1_3:A
+*539 _2__4_
+*540 MUX2X1_3:Y
+*541 DFFSR_10:D
+*542 _8_
+*543 INVX1_11:Y
+*544 MUX2X1_4:A
+*545 _2__5_
+*546 MUX2X1_4:Y
+*547 DFFSR_11:D
+*548 _10_
+*549 INVX1_13:Y
+*550 MUX2X1_5:A
+*551 _2__6_
+*552 MUX2X1_5:Y
+*553 DFFSR_12:D
+*554 _12_
+*555 INVX1_15:Y
+*556 MUX2X1_6:A
+*557 _2__7_
+*558 MUX2X1_6:Y
+*559 DFFSR_13:D
+*560 _14_
+*561 INVX1_17:Y
+*562 MUX2X1_7:A
+*563 _2__8_
+*564 MUX2X1_7:Y
+*565 DFFSR_14:D
+*566 _16_
+*567 INVX1_19:Y
+*568 AOI21X1_2:A
+*569 N_0_
+*570 NOR2X1_5:A
+*571 _17_
+*572 NOR2X1_5:Y
+*573 AOI21X1_2:C
+*574 _2__0_
+*575 AOI21X1_2:Y
+*576 DFFSR_6:D
+*577 _20_
+*578 OAI21X1_3:Y
+*579 AOI21X1_3:C
+*580 _21_
+*581 AOI21X1_3:Y
+*582 NOR2X1_6:B
+*583 _22_
+*584 OAI21X1_4:Y
+*585 NOR2X1_6:A
+*586 _3__0_
+*587 NOR2X1_6:Y
+*588 DFFSR_24:D
+*589 _23_
+*590 OAI21X1_5:Y
+*591 AOI21X1_4:C
+*592 _3__2_
+*593 AOI21X1_4:Y
+*594 DFFSR_26:D
+*595 _24_
+*596 OAI21X1_6:Y
+*597 AOI21X1_5:C
+*598 _3__3_
+*599 AOI21X1_5:Y
+*600 DFFSR_27:D
+*601 _25_
+*602 OAI21X1_7:Y
+*603 AOI21X1_6:C
+*604 _3__4_
+*605 AOI21X1_6:Y
+*606 DFFSR_28:D
+*607 _26_
+*608 OAI21X1_8:Y
+*609 AOI21X1_7:C
+*610 _3__5_
+*611 AOI21X1_7:Y
+*612 DFFSR_29:D
+*613 _27_
+*614 OAI21X1_9:Y
+*615 AOI21X1_8:C
+*616 _3__6_
+*617 AOI21X1_8:Y
+*618 DFFSR_30:D
+*619 _28_
+*620 OAI21X1_10:Y
+*621 AOI21X1_9:C
+*622 _3__7_
+*623 AOI21X1_9:Y
+*624 DFFSR_31:D
+*625 _29_
+*626 INVX1_20:Y
+*627 OAI21X1_12:B
+*628 _30_
+*629 AND2X2_1:Y
+*630 OAI21X1_11:B
+*631 _32_
+*632 OAI21X1_11:Y
+*633 OAI21X1_12:C
+*634 _0__0_
+*635 OAI21X1_12:Y
+*636 DFFSR_16:D
+*637 _33_
+*638 NOR2X1_8:Y
+*639 OAI21X1_13:A
+*640 _36_
+*641 OAI21X1_13:Y
+*642 NAND2X1_3:A
+*643 _39_
+*644 NOR2X1_9:Y
+*645 OAI21X1_14:A
+*646 _40_
+*647 OAI21X1_14:Y
+*648 NAND2X1_3:B
+*649 _0__1_
+*650 NAND2X1_3:Y
+*651 DFFSR_17:D
+*652 _41_
+*653 AOI21X1_10:Y
+*654 OAI21X1_15:C
+*655 _42_
+*656 OAI21X1_15:Y
+*657 OAI21X1_16:C
+*658 _43_
+*659 XNOR2X1_3:Y
+*660 OAI21X1_16:B
+*661 _0__2_
+*662 OAI21X1_16:Y
+*663 DFFSR_18:D
+*664 _46_
+*665 OAI21X1_17:Y
+*666 NAND2X1_5:B
+*667 _47_
+*668 NAND2X1_5:Y
+*669 AOI22X1_1:B
+*670 _50_
+*671 INVX1_22:Y
+*672 NAND2X1_6:A
+*673 _51_
+*674 NAND2X1_6:Y
+*675 AOI21X1_11:A
+*676 _52_
+*677 AOI21X1_11:Y
+*678 AOI22X1_1:D
+*679 _0__3_
+*680 AOI22X1_1:Y
+*681 DFFSR_19:D
+*682 _53_
+*683 INVX1_23:Y
+*684 AOI21X1_12:C
+*685 _54_
+*686 AOI21X1_12:Y
+*687 OAI22X1_1:A
+*688 _55_
+*689 OAI21X1_18:Y
+*690 OAI22X1_1:B
+*691 _57_
+*692 XNOR2X1_4:Y
+*693 OAI22X1_1:D
+*694 _0__4_
+*695 OAI22X1_1:Y
+*696 DFFSR_20:D
+*697 _58_
+*698 NOR2X1_11:Y
+*699 NAND3X1_4:C
+*700 _61_
+*701 OAI21X1_19:Y
+*702 NAND2X1_7:B
+*703 _62_
+*704 NAND2X1_7:Y
+*705 OAI21X1_22:B
+*706 _63_
+*707 NOR3X1_2:Y
+*708 OAI21X1_21:A
+*709 _64_
+*710 OAI21X1_20:Y
+*711 INVX1_25:A
+*712 _65_
+*713 INVX1_25:Y
+*714 OAI21X1_21:B
+*715 _66_
+*716 OAI21X1_21:Y
+*717 OAI21X1_22:C
+*718 _0__5_
+*719 OAI21X1_22:Y
+*720 DFFSR_21:D
+*721 _68_
+*722 OAI21X1_23:Y
+*723 INVX1_27:A
+*724 _69_
+*725 INVX1_27:Y
+*726 OAI21X1_24:C
+*727 _70_
+*728 OAI21X1_24:Y
+*729 OAI21X1_25:C
+*730 _71_
+*731 NAND2X1_8:Y
+*732 NOR2X1_12:B
+*733 _73_
+*734 INVX1_29:Y
+*735 NAND3X1_5:C
+*736 _74_
+*737 NAND3X1_5:Y
+*738 NOR2X1_12:A
+*739 _76_
+*740 INVX1_30:Y
+*741 NAND3X1_6:C
+*742 _77_
+*743 NAND3X1_6:Y
+*744 AOI22X1_2:D
+*745 _78_
+*746 AOI22X1_2:Y
+*747 OAI21X1_25:B
+*748 _0__6_
+*749 OAI21X1_25:Y
+*750 DFFSR_22:D
+*751 _79_
+*752 INVX1_31:Y
+*753 OAI21X1_26:C
+*754 _80_
+*755 OAI21X1_26:Y
+*756 NAND3X1_8:B
+*757 _81_
+*758 NAND3X1_7:Y
+*759 NAND3X1_8:C
+*760 _82_
+*761 NAND3X1_8:Y
+*762 AND2X2_3:B
+*763 _83_
+*764 INVX1_32:Y
+*765 NAND3X1_9:B
+*766 _85_
+*767 OAI21X1_27:Y
+*768 NAND3X1_10:B
+*769 _86_
+*770 NAND3X1_10:Y
+*771 AND2X2_3:A
+*772 _0__7_
+*773 AND2X2_3:Y
+*774 DFFSR_23:D
+*775 _87_
+*776 INVX1_33:Y
+*777 AOI21X1_13:B
+*778 _88_
+*779 INVX1_34:Y
+*780 NAND3X1_11:C
+*781 _89_
+*782 NAND3X1_11:Y
+*783 AOI21X1_13:A
+*784 _1_
+*785 AOI21X1_13:Y
+*786 DFFSR_15:D
+*787 _90_
+*788 OAI21X1_28:Y
+*789 AOI21X1_14:C
+*790 _3__1_
+*791 AOI21X1_14:Y
+*792 DFFSR_25:D
+*793 _4_
+*794 AND2X2_4:Y
+*795 DFFSR_1:D
+*796 _5_
+*797 INVX1_35:Y
+*798 DFFSR_3:D
+*799 reset
+*800 INVX8_2:A
+*801 counter_0_
+*802 BUFX2_1:Y
+*803 counter_1_
+*804 BUFX2_2:Y
+*805 counter_2_
+*806 BUFX2_3:Y
+*807 counter_3_
+*808 BUFX2_4:Y
+*809 counter_4_
+*810 BUFX2_5:Y
+*811 counter_5_
+*812 BUFX2_6:Y
+*813 counter_6_
+*814 BUFX2_7:Y
+*815 counter_7_
+*816 BUFX2_8:Y
+*817 done
+*818 BUFX2_9:Y
+*819 dp_0_
+*820 BUFX2_10:Y
+*821 dp_1_
+*822 BUFX2_11:Y
+*823 dp_2_
+*824 BUFX2_12:Y
+*825 dp_3_
+*826 BUFX2_13:Y
+*827 dp_4_
+*828 BUFX2_14:Y
+*829 dp_5_
+*830 BUFX2_15:Y
+*831 dp_6_
+*832 BUFX2_16:Y
+*833 dp_7_
+*834 BUFX2_17:Y
+*835 dp_8_
+*836 BUFX2_18:Y
+*837 sr_0_
+*838 BUFX2_19:Y
+*839 sr_1_
+*840 BUFX2_20:Y
+*841 sr_2_
+*842 BUFX2_21:Y
+*843 sr_3_
+*844 BUFX2_22:Y
+*845 sr_4_
+*846 BUFX2_23:Y
+*847 sr_5_
+*848 BUFX2_24:Y
+*849 sr_6_
+*850 BUFX2_25:Y
+*851 sr_7_
+*852 BUFX2_26:Y
+
+*PORTS
+*139 I
+*266 I
+*271 I
+*321 I
+*360 I
+*376 I
+*455 I
+*462 I
+*465 I
+*480 I
+*569 I
+*799 I
+*801 O
+*803 O
+*805 O
+*807 O
+*809 O
+*811 O
+*813 O
+*815 O
+*817 O
+*819 O
+*821 O
+*823 O
+*825 O
+*827 O
+*829 O
+*831 O
+*833 O
+*835 O
+*837 O
+*839 O
+*841 O
+*843 O
+*845 O
+*847 O
+*849 O
+*851 O
+
+*D_NET *1 0.00453096
+*CONN
+*I *2 O *D INVX4
+*I *3 I *L 0.0180101
+*I *4 I *L 0.0222511
+*I *5 I *L 0.0177118
+*I *6 I *L 0.022204
+*I *7 I *L 0.0180101
+*I *8 I *L 0.0180101
+*I *9 I *L 0.0180101
+*I *10 I *L 0.0180101
+*I *11 I *L 0.0180101
+*I *12 I *L 0.0180101
+*I *13 I *L 0.0180101
+*I *14 I *L 0.0180101
+*I *15 I *L 0.0265312
+*I *16 I *L 0.0180101
+*I *17 I *L 0.0180101
+*I *18 I *L 0.02277
+*CAP
+1 1_1 0.00018864
+2 1_2 4.896e-05
+3 1_3 0.00011424
+4 1_4 6.12e-05
+5 1_5 0.0001584
+6 1_6 0.000132
+7 1_7 0.00021504
+8 1_8 6.12e-05
+9 1_9 4.032e-05
+10 1_10 0.00013536
+11 1_11 0.00013824
+12 1_12 0
+13 1_13 0.00028464
+14 1_14 0.00020184
+15 1_15 4.08e-05
+16 1_16 2.04e-05
+17 1_17 0.00033216
+18 1_18 0.0001836
+19 1_19 2.04e-05
+20 1_20 0.00051624
+21 1_21 3.264e-05
+22 1_22 6.048e-05
+23 1_23 0
+24 1_24 0.00037152
+25 1_25 0.0004824
+26 1_26 2.04e-05
+27 1_27 0.00013536
+28 1_28 2.04e-05
+29 1_29 0.00022176
+30 1_30 0
+31 1_31 0.00029232
+*RES
+1 *2 1_1 1.77333
+2 1_1 1_2 0.76
+3 1_2 *3 0
+4 1_1 1_3 3.17333
+5 1_3 1_4 0.7
+6 1_4 *4 0
+7 1_3 1_5 3.2
+8 1_5 1_6 1.8
+9 1_6 *5 0
+10 1_5 1_7 5.97333
+11 1_7 1_8 0.7
+12 1_8 *6 0
+13 1_7 1_9 1.12
+14 1_9 1_10 1.36
+15 1_10 1_11 1.24
+16 1_11 1_12 0
+17 1_12 *7 0
+18 1_12 1_13 4.57333
+19 1_13 *8 0
+20 1_10 1_14 5.27333
+21 1_14 1_15 0.466667
+22 1_15 1_16 0.233333
+23 1_16 *9 0
+24 1_16 1_17 5.22667
+25 1_17 *10 0
+26 1_14 1_18 2.1
+27 1_18 1_19 0.233333
+28 1_19 *11 0
+29 1_19 1_20 6.67333
+30 1_20 1_21 0.373333
+31 1_21 *12 0
+32 1_20 1_22 1.68
+33 1_22 1_23 0
+34 1_23 *13 0
+35 1_22 1_24 4.48
+36 1_24 *14 0
+37 1_9 1_25 3.53333
+38 1_25 1_26 0.233333
+39 1_26 *15 0
+40 1_26 1_27 2.42667
+41 1_27 1_28 0.233333
+42 1_28 *16 0
+43 1_28 1_29 6.16
+44 1_29 1_30 0
+45 1_30 *17 0
+46 1_29 1_31 5.85333
+47 1_31 *18 0
+*END
+*D_NET *19 0.0025632
+*CONN
+*I *20 O *D DFFSR
+*I *21 I *L 0.0265618
+*I *22 I *L 0.0180101
+*I *23 I *L 0.0265312
+*I *24 I *L 0.0180101
+*I *25 I *L 0.02277
+*I *26 I *L 0.026839
+*I *27 I *L 0.0265312
+*I *28 I *L 0.0180101
+*I *29 I *L 0.0222511
+*I *30 I *L 0.0548793
+*I *31 I *L 0.02277
+*I *32 I *L 0.0177118
+*CAP
+1 19_1 0.0002352
+2 19_2 0
+3 19_3 3.36e-05
+4 19_4 8.4e-06
+5 19_5 4.08e-05
+6 19_6 2.04e-05
+7 19_7 0.0003192
+8 19_8 4.08e-05
+9 19_9 0.0001224
+10 19_10 0.00011424
+11 19_11 0.00010752
+12 19_12 0.00023664
+13 19_13 0
+14 19_14 0.00028128
+15 19_15 2.04e-05
+16 19_16 0.0002448
+17 19_17 6.744e-05
+18 19_18 2.688e-05
+19 19_19 0.00013704
+20 19_20 0
+21 19_21 8.808e-05
+22 19_22 0.00034368
+23 19_23 7.44e-05
+*RES
+1 *20 19_1 6.53333
+2 19_1 19_2 0
+3 19_2 *21 0
+4 19_2 19_3 0.933333
+5 19_3 19_4 0.233333
+6 19_4 19_5 0.466667
+7 19_5 19_6 0.233333
+8 19_6 *22 0
+9 19_6 19_7 4.2
+10 19_7 19_8 0.466667
+11 19_8 *23 0
+12 19_7 19_9 1.4
+13 19_9 19_10 1.30667
+14 19_10 *24 0
+15 19_9 19_11 2.98667
+16 19_11 *25 0
+17 19_4 19_12 2.70667
+18 19_12 19_13 0
+19 19_13 *26 0
+20 19_13 19_14 2.88
+21 19_14 19_15 0.233333
+22 19_15 *27 0
+23 19_15 19_16 2.8
+24 19_16 19_17 1.54
+25 19_17 19_18 0.746667
+26 19_18 *28 0
+27 19_17 19_19 1.40667
+28 19_19 19_20 0
+29 19_20 *29 0
+30 19_20 19_21 1.44667
+31 19_21 *30 0
+32 19_16 19_22 8.21333
+33 19_22 *31 0
+34 19_4 19_23 1.4
+35 19_23 *32 0
+*END
+*D_NET *33 0.00306864
+*CONN
+*I *34 O *D NAND3X1
+*I *35 I *L 0.0295792
+*I *36 I *L 0.0295792
+*I *37 I *L 0.0295792
+*I *38 I *L 0.0295792
+*I *39 I *L 0.0268633
+*I *40 I *L 0.0227534
+*I *41 I *L 0.0227534
+*I *42 I *L 0.0268633
+*I *43 I *L 0.0295792
+*I *44 I *L 0.0295792
+*I *45 I *L 0.0295792
+*CAP
+1 33_1 0.00039984
+2 33_2 0.00014496
+3 33_3 0
+4 33_4 0.00060792
+5 33_5 2.04e-05
+6 33_6 0.00011424
+7 33_7 0
+8 33_8 0.00025896
+9 33_9 6.12e-05
+10 33_10 0.0002244
+11 33_11 5.76e-05
+12 33_12 0.00028968
+13 33_13 9.84e-05
+14 33_14 2.016e-05
+15 33_15 2.016e-05
+16 33_16 0.0003216
+17 33_17 8.16e-05
+18 33_18 4.704e-05
+19 33_19 8.16e-05
+20 33_20 0.00021888
+*RES
+1 *34 33_1 4.57333
+2 33_1 *35 0
+3 33_1 33_2 2.8
+4 33_2 33_3 0
+5 33_3 *36 0
+6 33_2 33_4 7.28667
+7 33_4 33_5 0.233333
+8 33_5 *37 0
+9 33_5 33_6 3.17333
+10 33_6 33_7 0
+11 33_7 *38 0
+12 33_6 33_8 6.86
+13 33_8 33_9 0.7
+14 33_9 *39 0
+15 33_8 33_10 2.56667
+16 33_10 33_11 0.373333
+17 33_11 *40 0
+18 33_10 33_12 3.31333
+19 33_12 33_13 0.84
+20 33_13 *41 0
+21 33_12 33_14 0.56
+22 33_14 33_15 0.56
+23 33_15 *42 0
+24 33_14 33_16 2.93333
+25 33_16 33_17 0.933333
+26 33_17 *43 0
+27 33_16 33_18 1.30667
+28 33_18 33_19 0.933333
+29 33_19 *44 0
+30 33_18 33_20 3.48
+31 33_20 *45 0
+*END
+*D_NET *46 0.00142584
+*CONN
+*I *47 O *D CLKBUF1
+*I *48 I *L 0.0134469
+*I *49 I *L 0.0134469
+*I *50 I *L 0.0134469
+*I *51 I *L 0.0134469
+*I *52 I *L 0.0134469
+*I *53 I *L 0.0134469
+*I *54 I *L 0.0134469
+*CAP
+1 46_1 0.00019632
+2 46_2 4.08e-05
+3 46_3 0.00017472
+4 46_4 0.00012144
+5 46_5 0.000306
+6 46_6 2.04e-05
+7 46_7 0.00011136
+8 46_8 1.344e-05
+9 46_9 0.0001536
+10 46_10 2.016e-05
+11 46_11 6.6e-05
+12 46_12 3.36e-05
+13 46_13 0.000168
+*RES
+1 *47 46_1 3.45333
+2 46_1 46_2 0.466667
+3 46_2 *48 0
+4 46_1 46_3 4.85333
+5 46_3 46_4 2.70667
+6 46_4 *49 0
+7 46_3 46_5 3.5
+8 46_5 46_6 0.233333
+9 46_6 *50 0
+10 46_6 46_7 1.89333
+11 46_7 46_8 0.373333
+12 46_8 *51 0
+13 46_7 46_9 1.06667
+14 46_9 46_10 0.56
+15 46_10 *52 0
+16 46_9 46_11 0.633333
+17 46_11 46_12 0.933333
+18 46_12 *53 0
+19 46_11 46_13 4.66667
+20 46_13 *54 0
+*END
+*D_NET *55 0.00168984
+*CONN
+*I *56 O *D CLKBUF1
+*I *57 I *L 0.0134469
+*I *58 I *L 0.0134469
+*I *59 I *L 0.0134469
+*I *60 I *L 0.0134469
+*I *61 I *L 0.0134469
+*I *62 I *L 0.0134469
+*I *63 I *L 0.0134469
+*CAP
+1 55_1 6.96e-05
+2 55_2 4.224e-05
+3 55_3 9.408e-05
+4 55_4 0.0003672
+5 55_5 0.0001008
+6 55_6 3.84e-05
+7 55_7 0
+8 55_8 0.0003264
+9 55_9 2.04e-05
+10 55_10 0.00014784
+11 55_11 0.00015648
+12 55_12 0
+13 55_13 0.0003264
+*RES
+1 *56 55_1 0.933333
+2 55_1 55_2 0.573333
+3 55_2 *57 0
+4 55_1 55_3 2.61333
+5 55_3 55_4 4.2
+6 55_4 *58 0
+7 55_3 55_5 2.8
+8 55_5 55_6 0.266667
+9 55_6 55_7 0
+10 55_7 *59 0
+11 55_7 55_8 3.73333
+12 55_8 55_9 0.233333
+13 55_9 *60 0
+14 55_9 55_10 4.10667
+15 55_10 *61 0
+16 55_5 55_11 3.74667
+17 55_11 55_12 0
+18 55_12 *62 0
+19 55_12 55_13 3.73333
+20 55_13 *63 0
+*END
+*D_NET *64 0.0014496
+*CONN
+*I *65 O *D BUFX4
+*I *66 I *L 0.0357813
+*I *67 I *L 0.0357813
+*I *68 I *L 0.0357813
+*I *69 I *L 0.0357813
+*I *70 I *L 0.0357813
+*I *71 I *L 0.0357813
+*I *72 I *L 0.0357813
+*CAP
+1 64_1 2.04e-05
+2 64_2 0.0001632
+3 64_3 0.0002244
+4 64_4 0.0002088
+5 64_5 4.032e-05
+6 64_6 2.016e-05
+7 64_7 0
+8 64_8 0.0002448
+9 64_9 0.00014064
+10 64_10 0.0002448
+11 64_11 0.00014208
+*RES
+1 *65 64_1 0.233333
+2 64_1 64_2 1.86667
+3 64_2 64_3 2.56667
+4 64_3 *66 0
+5 64_2 64_4 5.13333
+6 64_4 *67 0
+7 64_4 64_5 1.12
+8 64_5 64_6 0.56
+9 64_6 64_7 0
+10 64_7 *68 0
+11 64_7 64_8 2.8
+12 64_8 *69 0
+13 64_5 64_9 1.44
+14 64_9 *70 0
+15 64_9 64_10 2.8
+16 64_10 *71 0
+17 64_1 64_11 2.61333
+18 64_11 *72 0
+*END
+*D_NET *73 0.00136704
+*CONN
+*I *74 O *D BUFX4
+*I *75 I *L 0.0357813
+*I *76 I *L 0.0357813
+*I *77 I *L 0.0357813
+*I *78 I *L 0.0357813
+*I *79 I *L 0.0357813
+*I *80 I *L 0.0357813
+*I *81 I *L 0.0357813
+*CAP
+1 73_1 0.00012528
+2 73_2 0.000204
+3 73_3 2.04e-05
+4 73_4 0.0002988
+5 73_5 2.04e-05
+6 73_6 4.704e-05
+7 73_7 0.0002448
+8 73_8 2.04e-05
+9 73_9 0.0002916
+10 73_10 2.04e-05
+11 73_11 7.392e-05
+*RES
+1 *74 73_1 1.58667
+2 73_1 *75 0
+3 73_1 73_2 2.33333
+4 73_2 73_3 0.233333
+5 73_3 *76 0
+6 73_3 73_4 3.96667
+7 73_4 73_5 0.233333
+8 73_5 *77 0
+9 73_5 73_6 1.30667
+10 73_6 *78 0
+11 73_1 73_7 2.8
+12 73_7 73_8 0.233333
+13 73_8 *79 0
+14 73_8 73_9 4.43333
+15 73_9 73_10 0.233333
+16 73_10 *80 0
+17 73_10 73_11 2.05333
+18 73_11 *81 0
+*END
+*D_NET *82 0.00207312
+*CONN
+*I *83 O *D DFFSR
+*I *84 I *L 0.0222511
+*I *85 I *L 0.0222511
+*I *86 I *L 0.0265618
+*I *87 I *L 0.0180101
+*I *88 I *L 0.109759
+*I *89 I *L 0.0180101
+*I *90 I *L 0.0265312
+*CAP
+1 82_1 2.04e-05
+2 82_2 0.00031056
+3 82_3 9.408e-05
+4 82_4 8.112e-05
+5 82_5 0.00025008
+6 82_6 2.04e-05
+7 82_7 8.784e-05
+8 82_8 0.0001716
+9 82_9 0.00021936
+10 82_10 7.68e-05
+11 82_11 0.0004356
+12 82_12 2.04e-05
+13 82_13 0.00028488
+*RES
+1 *83 82_1 0.233333
+2 82_1 82_2 6.62667
+3 82_2 82_3 2.61333
+4 82_3 82_4 1.58667
+5 82_4 *84 0
+6 82_3 82_5 2.48
+7 82_5 82_6 0.233333
+8 82_6 *85 0
+9 82_6 82_7 1.77333
+10 82_7 *86 0
+11 82_2 82_8 2.1
+12 82_8 *87 0
+13 82_1 82_9 3.89333
+14 82_9 82_10 0.533333
+15 82_10 *88 0
+16 82_9 82_11 8.56667
+17 82_11 82_12 0.233333
+18 82_12 *89 0
+19 82_12 82_13 4.24667
+20 82_13 *90 0
+*END
+*D_NET *91 0.0011868
+*CONN
+*I *92 O *D CLKBUF1
+*I *93 I *L 0.0134469
+*I *94 I *L 0.0134469
+*I *95 I *L 0.0134469
+*I *96 I *L 0.0134469
+*I *97 I *L 0.0134469
+*I *98 I *L 0.0134469
+*CAP
+1 91_1 0.00020952
+2 91_2 0
+3 91_3 0.0002124
+4 91_4 0.00016968
+5 91_5 0.00016896
+6 91_6 1.344e-05
+7 91_7 0.0001536
+8 91_8 1.344e-05
+9 91_9 0
+10 91_10 0.000168
+11 91_11 7.776e-05
+*RES
+1 *92 91_1 4.15333
+2 91_1 91_2 0
+3 91_2 *93 0
+4 91_2 91_3 2.56667
+5 91_3 91_4 2.38
+6 91_4 *94 0
+7 91_3 91_5 2.29333
+8 91_5 91_6 0.373333
+9 91_6 *95 0
+10 91_5 91_7 1.06667
+11 91_7 91_8 0.373333
+12 91_8 91_9 0
+13 91_9 *96 0
+14 91_8 91_10 4.66667
+15 91_10 *97 0
+16 91_7 91_11 0.96
+17 91_11 *98 0
+*END
+*D_NET *99 0.00132288
+*CONN
+*I *100 O *D CLKBUF1
+*I *101 I *L 0.0134469
+*I *102 I *L 0.0134469
+*I *103 I *L 0.0134469
+*I *104 I *L 0.0134469
+*I *105 I *L 0.0134469
+*I *106 I *L 0.0134469
+*CAP
+1 99_1 8.4e-06
+2 99_2 0.00025128
+3 99_3 0.0001008
+4 99_4 4.08e-05
+5 99_5 0.00035304
+6 99_6 2.04e-05
+7 99_7 0.00012144
+8 99_8 0.00017136
+9 99_9 3.36e-05
+10 99_10 0.00022176
+*RES
+1 *100 99_1 0.233333
+2 99_1 99_2 3.31333
+3 99_2 *101 0
+4 99_1 99_3 2.8
+5 99_3 99_4 0.466667
+6 99_4 *102 0
+7 99_3 99_5 4.80667
+8 99_5 99_6 0.233333
+9 99_6 *103 0
+10 99_6 99_7 1.30667
+11 99_7 *104 0
+12 99_1 99_8 4.76
+13 99_8 99_9 0.933333
+14 99_9 *105 0
+15 99_8 99_10 1.96
+16 99_10 *106 0
+*END
+*D_NET *107 0.0013524
+*CONN
+*I *108 O *D CLKBUF1
+*I *109 I *L 0.0134469
+*I *110 I *L 0.0134469
+*I *111 I *L 0.0134469
+*I *112 I *L 0.0134469
+*I *113 I *L 0.0134469
+*I *114 I *L 0.0134469
+*CAP
+1 107_1 0.00023664
+2 107_2 4.08e-05
+3 107_3 0.0001764
+4 107_4 3.36e-05
+5 107_5 0.00035304
+6 107_6 4.08e-05
+7 107_7 0.00012768
+8 107_8 2.688e-05
+9 107_9 8.4e-06
+10 107_10 0.0001536
+11 107_11 0.00015456
+*RES
+1 *108 107_1 2.70667
+2 107_1 107_2 0.466667
+3 107_2 *109 0
+4 107_1 107_3 3.5
+5 107_3 107_4 0.933333
+6 107_4 *110 0
+7 107_3 107_5 4.80667
+8 107_5 107_6 0.466667
+9 107_6 *111 0
+10 107_5 107_7 2.14667
+11 107_7 107_8 0.746667
+12 107_8 *112 0
+13 107_7 107_9 0.233333
+14 107_9 107_10 1.06667
+15 107_10 *113 0
+16 107_9 107_11 4.29333
+17 107_11 *114 0
+*END
+*D_NET *115 0.0011508
+*CONN
+*I *116 O *D BUFX4
+*I *117 I *L 0.0357813
+*I *118 I *L 0.0357813
+*I *119 I *L 0.0357813
+*I *120 I *L 0.0357813
+*I *121 I *L 0.0357813
+*I *122 I *L 0.0357813
+*CAP
+1 115_1 2.04e-05
+2 115_2 0.0001428
+3 115_3 0.00010848
+4 115_4 1.344e-05
+5 115_5 0.0002448
+6 115_6 2.04e-05
+7 115_7 0.00010944
+8 115_8 1.344e-05
+9 115_9 0.0002448
+10 115_10 0.0002328
+*RES
+1 *116 115_1 0.233333
+2 115_1 115_2 1.63333
+3 115_2 *117 0
+4 115_1 115_3 1.68
+5 115_3 115_4 0.373333
+6 115_4 *118 0
+7 115_3 115_5 2.8
+8 115_5 115_6 0.233333
+9 115_6 *119 0
+10 115_6 115_7 1.04
+11 115_7 115_8 0.373333
+12 115_8 *120 0
+13 115_8 115_9 2.8
+14 115_9 *121 0
+15 115_7 115_10 1.8
+16 115_10 *122 0
+*END
+*D_NET *123 0.00152688
+*CONN
+*I *124 O *D BUFX4
+*I *125 I *L 0.0357813
+*I *126 I *L 0.0357813
+*I *127 I *L 0.0357813
+*I *128 I *L 0.0357813
+*I *129 I *L 0.0357813
+*I *130 I *L 0.0357813
+*CAP
+1 123_1 0.00015552
+2 123_2 0.0001632
+3 123_3 0.0002448
+4 123_4 0.000102
+5 123_5 0.0003324
+6 123_6 0.00026376
+7 123_7 2.04e-05
+8 123_8 0.0002448
+*RES
+1 *124 123_1 2.98667
+2 123_1 123_2 1.86667
+3 123_2 *125 0
+4 123_2 123_3 2.8
+5 123_3 *126 0
+6 123_1 123_4 1.16667
+7 123_4 *127 0
+8 123_4 123_5 4.9
+9 123_5 *128 0
+10 123_1 123_6 4.99333
+11 123_6 123_7 0.233333
+12 123_7 *129 0
+13 123_7 123_8 2.8
+14 123_8 *130 0
+*END
+*D_NET *131 0.00107832
+*CONN
+*I *132 O *D BUFX4
+*I *133 I *L 0.0323255
+*I *134 I *L 0.0357813
+*I *135 I *L 0.0357813
+*I *136 I *L 0.0357813
+*I *137 I *L 0.0357813
+*I *138 I *L 0.0357813
+*CAP
+1 131_1 2.688e-05
+2 131_2 1.344e-05
+3 131_3 0.0002244
+4 131_4 8.736e-05
+5 131_5 0.00027744
+6 131_6 0.000204
+7 131_7 0.0002448
+*RES
+1 *132 131_1 0.746667
+2 131_1 131_2 0.373333
+3 131_2 *133 0
+4 131_1 131_3 2.56667
+5 131_3 *134 0
+6 131_3 131_4 2.42667
+7 131_4 *135 0
+8 131_4 131_5 3.17333
+9 131_5 *136 0
+10 131_5 131_6 2.33333
+11 131_6 *137 0
+12 131_6 131_7 2.8
+13 131_7 *138 0
+*END
+*D_NET *139 0.00160872
+*CONN
+*P *139 O
+*I *140 I *L 0.0549205
+*I *141 I *L 0.0549205
+*I *142 I *L 0.0549205
+*I *143 I *L 0.0549205
+*I *144 I *L 0.0549205
+*CAP
+1 139_1 0.00018768
+2 139_2 2.04e-05
+3 139_3 0.00039456
+4 139_4 0.00024408
+5 139_5 0.00011496
+6 139_6 8.16e-05
+7 139_7 0.00020184
+8 139_8 0.000282
+9 139_9 8.16e-05
+*RES
+1 *139 139_1 2.14667
+2 139_1 139_2 0.233333
+3 139_2 *140 0
+4 139_2 139_3 3.89333
+5 139_3 139_4 3.78
+6 139_4 *141 0
+7 139_3 139_5 2.19333
+8 139_5 139_6 0.933333
+9 139_6 *142 0
+10 139_5 139_7 5.27333
+11 139_7 139_8 2.94
+12 139_8 *143 0
+13 139_7 139_9 0.933333
+14 139_9 *144 0
+*END
+*D_NET *145 0.00196128
+*CONN
+*I *146 O *D INVX8
+*I *147 I *L 0.0204034
+*I *148 I *L 0.0204034
+*I *149 I *L 0.0204034
+*I *150 I *L 0.0204034
+*I *151 I *L 0.0204034
+*CAP
+1 145_1 0.00029112
+2 145_2 5.76e-05
+3 145_3 0.00010848
+4 145_4 0.00033096
+5 145_5 0.0002676
+6 145_6 0.00014112
+7 145_7 0.0004812
+8 145_8 4.08e-05
+9 145_9 0.0002424
+*RES
+1 *146 145_1 5.08667
+2 145_1 145_2 0.373333
+3 145_2 *147 0
+4 145_1 145_3 1.68
+5 145_3 145_4 6.86
+6 145_4 *148 0
+7 145_3 145_5 2.03333
+8 145_5 145_6 3.92
+9 145_6 *149 0
+10 145_5 145_7 5.83333
+11 145_7 145_8 0.466667
+12 145_8 *150 0
+13 145_7 145_9 6.06667
+14 145_9 *151 0
+*END
+*D_NET *152 0.00052392
+*CONN
+*I *153 O *D BUFX4
+*I *154 I *L 0.0265613
+*I *155 I *L 0.0265613
+*I *156 I *L 0.0270702
+*I *157 I *L 0.0270702
+*I *158 I *L 0.0265613
+*CAP
+1 152_1 0.0002244
+2 152_2 0.0001584
+3 152_3 1.344e-05
+4 152_4 4.032e-05
+5 152_5 0
+6 152_6 4.032e-05
+7 152_7 0
+8 152_8 4.704e-05
+*RES
+1 *153 152_1 2.43333
+2 152_1 152_2 1.02667
+3 152_2 *154 0
+4 152_1 152_3 0.373333
+5 152_3 *155 0
+6 152_1 152_4 1.12
+7 152_4 152_5 0
+8 152_5 *156 0
+9 152_4 152_6 1.12
+10 152_6 152_7 0
+11 152_7 *157 0
+12 152_6 152_8 1.30667
+13 152_8 *158 0
+*END
+*D_NET *159 0.00088848
+*CONN
+*I *160 O *D BUFX4
+*I *161 I *L 0.0270702
+*I *162 I *L 0.0265613
+*I *163 I *L 0.0270702
+*I *164 I *L 0.0270702
+*I *165 I *L 0.0265613
+*CAP
+1 159_1 0.000216
+2 159_2 4.704e-05
+3 159_3 0
+4 159_4 0.0003312
+5 159_5 0.00020784
+6 159_6 8.64e-05
+*RES
+1 *160 159_1 1.4
+2 159_1 *161 0
+3 159_1 159_2 1.30667
+4 159_2 159_3 0
+5 159_3 *162 0
+6 159_3 159_4 3.36
+7 159_4 *163 0
+8 159_2 159_5 3.30667
+9 159_5 *164 0
+10 159_5 159_6 0.56
+11 159_6 *165 0
+*END
+*D_NET *166 0.00124008
+*CONN
+*I *167 O *D BUFX4
+*I *168 I *L 0.0226301
+*I *169 I *L 0.022204
+*I *170 I *L 0.0265312
+*I *171 I *L 0.0180033
+*I *172 I *L 0.0227534
+*CAP
+1 166_1 0.0001692
+2 166_2 4.08e-05
+3 166_3 0.00011424
+4 166_4 8.16e-05
+5 166_5 0.0001488
+6 166_6 0.00010752
+7 166_7 0.00052032
+8 166_8 5.76e-05
+*RES
+1 *167 166_1 3.03333
+2 166_1 166_2 0.466667
+3 166_2 *168 0
+4 166_1 166_3 3.17333
+5 166_3 166_4 0.933333
+6 166_4 *169 0
+7 166_3 166_5 1.73333
+8 166_5 166_6 2.98667
+9 166_6 *170 0
+10 166_5 166_7 5.52
+11 166_7 *171 0
+12 166_7 166_8 0.373333
+13 166_8 *172 0
+*END
+*D_NET *173 0.00109848
+*CONN
+*I *174 O *D DFFSR
+*I *175 I *L 0.0134147
+*I *176 I *L 0.0134094
+*I *177 I *L 0.0310602
+*I *178 I *L 0.0310602
+*I *179 I *L 0.0180101
+*CAP
+1 173_1 0.0004548
+2 173_2 0.00015624
+3 173_3 9.48e-05
+4 173_4 1.344e-05
+5 173_5 0
+6 173_6 4.704e-05
+7 173_7 0.0001536
+8 173_8 0.00017856
+*RES
+1 *174 173_1 6.3
+2 173_1 *175 0
+3 173_1 173_2 2.00667
+4 173_2 173_3 0.833333
+5 173_3 173_4 0.373333
+6 173_4 173_5 0
+7 173_5 *176 0
+8 173_4 173_6 1.30667
+9 173_6 *177 0
+10 173_3 173_7 2.42667
+11 173_7 *178 0
+12 173_2 173_8 4.29333
+13 173_8 *179 0
+*END
+*D_NET *180 0.00102312
+*CONN
+*I *181 O *D DFFSR
+*I *182 I *L 0.0311174
+*I *183 I *L 0.0311174
+*I *184 I *L 0.0274396
+*I *185 I *L 0.0134147
+*I *186 I *L 0.0265312
+*CAP
+1 180_1 0.00021
+2 180_2 6.12e-05
+3 180_3 0.00014784
+4 180_4 6.12e-05
+5 180_5 2.04e-05
+6 180_6 0.00023064
+7 180_7 8.784e-05
+8 180_8 2.04e-05
+9 180_9 0.0001836
+*RES
+1 *181 180_1 3.5
+2 180_1 180_2 0.7
+3 180_2 *182 0
+4 180_1 180_3 4.10667
+5 180_3 180_4 0.7
+6 180_4 180_5 0.233333
+7 180_5 *183 0
+8 180_5 180_6 3.40667
+9 180_6 *184 0
+10 180_3 180_7 1.77333
+11 180_7 180_8 0.233333
+12 180_8 *185 0
+13 180_8 180_9 2.1
+14 180_9 *186 0
+*END
+*D_NET *187 0.00120216
+*CONN
+*I *188 O *D NAND3X1
+*I *189 I *L 0.0435905
+*I *190 I *L 0.0270661
+*I *191 I *L 0.0317844
+*I *192 I *L 0.0270702
+*I *193 I *L 0.0134094
+*CAP
+1 187_1 7.776e-05
+2 187_2 0.00020376
+3 187_3 0.00042744
+4 187_4 2.04e-05
+5 187_5 0.00017952
+6 187_6 5.424e-05
+7 187_7 0.00023904
+*RES
+1 *188 187_1 0.933333
+2 187_1 *189 0
+3 187_1 187_2 2.66
+4 187_2 *190 0
+5 187_1 187_3 6.20667
+6 187_3 187_4 0.233333
+7 187_4 *191 0
+8 187_4 187_5 2.45333
+9 187_5 187_6 0.84
+10 187_6 *192 0
+11 187_5 187_7 2.64
+12 187_7 *193 0
+*END
+*D_NET *194 0.00066672
+*CONN
+*I *195 O *D INVX8
+*I *196 I *L 0.0204034
+*I *197 I *L 0.0204034
+*I *198 I *L 0.0204034
+*I *199 I *L 0.0204034
+*CAP
+1 194_1 0.00022392
+2 194_2 0
+3 194_3 8.736e-05
+4 194_4 3.264e-05
+5 194_5 0.0002652
+6 194_6 5.76e-05
+*RES
+1 *195 194_1 3.22
+2 194_1 194_2 0
+3 194_2 *196 0
+4 194_2 194_3 2.42667
+5 194_3 194_4 0.373333
+6 194_4 *197 0
+7 194_3 194_5 3.03333
+8 194_5 *198 0
+9 194_2 194_6 0.373333
+10 194_6 *199 0
+*END
+*D_NET *200 0.00067896
+*CONN
+*I *201 O *D BUFX4
+*I *202 I *L 0.0270702
+*I *203 I *L 0.0265613
+*I *204 I *L 0.0270702
+*I *205 I *L 0.0265613
+*CAP
+1 200_1 0.00019992
+2 200_2 5.76e-05
+3 200_3 8.4e-06
+4 200_4 5.376e-05
+5 200_5 0.00029184
+6 200_6 2.04e-05
+7 200_7 4.704e-05
+*RES
+1 *201 200_1 3.22
+2 200_1 200_2 0.373333
+3 200_2 *202 0
+4 200_1 200_3 0.233333
+5 200_3 200_4 1.49333
+6 200_4 *203 0
+7 200_3 200_5 4.10667
+8 200_5 200_6 0.233333
+9 200_6 *204 0
+10 200_6 200_7 1.30667
+11 200_7 *205 0
+*END
+*D_NET *206 0.0007644
+*CONN
+*I *207 O *D DFFSR
+*I *208 I *L 0.0524659
+*I *209 I *L 0.0134094
+*I *210 I *L 0.0134147
+*I *211 I *L 0.0227534
+*CAP
+1 206_1 5.376e-05
+2 206_2 0.00015504
+3 206_3 4.08e-05
+4 206_4 2.04e-05
+5 206_5 0.00019008
+6 206_6 0.00014112
+7 206_7 0.0001632
+*RES
+1 *207 206_1 1.49333
+2 206_1 206_2 1.77333
+3 206_2 206_3 0.466667
+4 206_3 206_4 0.233333
+5 206_4 *208 0
+6 206_4 206_5 2.61333
+7 206_5 *209 0
+8 206_2 206_6 3.92
+9 206_6 *210 0
+10 206_1 206_7 1.86667
+11 206_7 *211 0
+*END
+*D_NET *212 0.00036504
+*CONN
+*I *213 O *D DFFSR
+*I *214 I *L 0.0134147
+*I *215 I *L 0.0177358
+*I *216 I *L 0.0222369
+*I *217 I *L 0.0227534
+*CAP
+1 212_1 4.704e-05
+2 212_2 4.08e-05
+3 212_3 6.72e-05
+4 212_4 4.08e-05
+5 212_5 7.44e-05
+6 212_6 0
+7 212_7 9.48e-05
+*RES
+1 *213 212_1 1.30667
+2 212_1 212_2 0.466667
+3 212_2 *214 0
+4 212_1 212_3 1.86667
+5 212_3 212_4 0.466667
+6 212_4 *215 0
+7 212_3 212_5 1.4
+8 212_5 212_6 0
+9 212_6 *216 0
+10 212_6 212_7 1.63333
+11 212_7 *217 0
+*END
+*D_NET *218 0.00085248
+*CONN
+*I *219 O *D DFFSR
+*I *220 I *L 0.0134147
+*I *221 I *L 0.0270661
+*I *222 I *L 0.0134094
+*I *223 I *L 0.0317844
+*CAP
+1 218_1 0.00019008
+2 218_2 0.0002472
+3 218_3 6.768e-05
+4 218_4 0.00011712
+5 218_5 4.08e-05
+6 218_6 0.0001896
+*RES
+1 *219 218_1 2.61333
+2 218_1 *220 0
+3 218_1 218_2 2.6
+4 218_2 218_3 1.21333
+5 218_3 *221 0
+6 218_2 218_4 1.65333
+7 218_4 218_5 0.466667
+8 218_5 *222 0
+9 218_4 218_6 2.14667
+10 218_6 *223 0
+*END
+*D_NET *224 0.00113856
+*CONN
+*I *225 O *D DFFSR
+*I *226 I *L 0.0134147
+*I *227 I *L 0.0134094
+*I *228 I *L 0.0180101
+*I *229 I *L 0.0265312
+*CAP
+1 224_1 8.64e-05
+2 224_2 0.00076344
+3 224_3 0
+4 224_4 0.00019392
+5 224_5 0
+6 224_6 9.48e-05
+*RES
+1 *225 224_1 0.56
+2 224_1 *226 0
+3 224_1 224_2 8.44667
+4 224_2 224_3 0
+5 224_3 *227 0
+6 224_3 224_4 3.58667
+7 224_4 224_5 0
+8 224_5 *228 0
+9 224_5 224_6 1.63333
+10 224_6 *229 0
+*END
+*D_NET *230 0.00090456
+*CONN
+*I *231 O *D DFFSR
+*I *232 I *L 0.0134147
+*I *233 I *L 0.0222369
+*I *234 I *L 0.0270702
+*I *235 I *L 0.0265312
+*CAP
+1 230_1 0.00010656
+2 230_2 8.4e-06
+3 230_3 0.0001188
+4 230_4 2.04e-05
+5 230_5 0.00033288
+6 230_6 0.00011424
+7 230_7 0.00020328
+*RES
+1 *231 230_1 1.12
+2 230_1 230_2 0.233333
+3 230_2 230_3 1.07333
+4 230_3 *232 0
+5 230_2 230_4 0.233333
+6 230_4 *233 0
+7 230_2 230_5 8.91333
+8 230_5 230_6 1.30667
+9 230_6 *234 0
+10 230_5 230_7 3.31333
+11 230_7 *235 0
+*END
+*D_NET *236 0.00106464
+*CONN
+*I *237 O *D DFFSR
+*I *238 I *L 0.0134094
+*I *239 I *L 0.0134147
+*I *240 I *L 0.0265312
+*I *241 I *L 0.0435905
+*CAP
+1 236_1 3.36e-05
+2 236_2 0.00026544
+3 236_3 8.736e-05
+4 236_4 0.00014232
+5 236_5 0.000162
+6 236_6 1.344e-05
+7 236_7 0.00036048
+*RES
+1 *237 236_1 0.933333
+2 236_1 236_2 3.17333
+3 236_2 *238 0
+4 236_1 236_3 2.42667
+5 236_3 236_4 2.28667
+6 236_4 *239 0
+7 236_3 236_5 1.3
+8 236_5 236_6 0.373333
+9 236_6 *240 0
+10 236_5 236_7 5.34667
+11 236_7 *241 0
+*END
+*D_NET *242 0.00101784
+*CONN
+*I *243 O *D DFFSR
+*I *244 I *L 0.0134094
+*I *245 I *L 0.0265312
+*I *246 I *L 0.0524659
+*I *247 I *L 0.0134147
+*CAP
+1 242_1 0.0002532
+2 242_2 0
+3 242_3 6.768e-05
+4 242_4 0.00027768
+5 242_5 0.00015576
+6 242_6 0.00026352
+*RES
+1 *243 242_1 3.03333
+2 242_1 242_2 0
+3 242_2 242_3 1.21333
+4 242_3 *244 0
+5 242_2 242_4 4.71333
+6 242_4 *245 0
+7 242_1 242_5 2.66
+8 242_5 *246 0
+9 242_1 242_6 5.32
+10 242_6 *247 0
+*END
+*D_NET *248 0.00086784
+*CONN
+*I *249 O *D DFFSR
+*I *250 I *L 0.0265312
+*I *251 I *L 0.0134094
+*I *252 I *L 0.0435905
+*I *253 I *L 0.0134147
+*CAP
+1 248_1 0.0001728
+2 248_2 2.016e-05
+3 248_3 0.0001752
+4 248_4 0.0003168
+5 248_5 1.344e-05
+6 248_6 0.00016944
+*RES
+1 *249 248_1 1.12
+2 248_1 *250 0
+3 248_1 248_2 0.56
+4 248_2 248_3 1.4
+5 248_3 *251 0
+6 248_2 248_4 2.2
+7 248_4 248_5 0.373333
+8 248_5 *252 0
+9 248_4 248_6 1.64
+10 248_6 *253 0
+*END
+*D_NET *254 0.00075792
+*CONN
+*I *255 O *D NAND2X1
+*I *256 I *L 0.0274396
+*I *257 I *L 0.0177118
+*I *258 I *L 0.0268633
+*I *259 I *L 0.0222511
+*CAP
+1 254_1 0.00042816
+2 254_2 8.64e-05
+3 254_3 2.04e-05
+4 254_4 0.0001416
+5 254_5 0
+6 254_6 8.136e-05
+*RES
+1 *255 254_1 5.22667
+2 254_1 254_2 0.56
+3 254_2 *256 0
+4 254_1 254_3 0.233333
+5 254_3 *257 0
+6 254_3 254_4 1.86667
+7 254_4 254_5 0
+8 254_5 *258 0
+9 254_5 254_6 1.26
+10 254_6 *259 0
+*END
+*D_NET *260 0.0005124
+*CONN
+*I *261 O *D INVX2
+*I *262 I *L 0.0270702
+*I *263 I *L 0.0270702
+*I *264 I *L 0.0265613
+*I *265 I *L 0.0270702
+*CAP
+1 260_1 3.36e-05
+2 260_2 1.344e-05
+3 260_3 0.00023664
+4 260_4 2.04e-05
+5 260_5 0.00012192
+6 260_6 8.64e-05
+*RES
+1 *261 260_1 0.933333
+2 260_1 260_2 0.373333
+3 260_2 *262 0
+4 260_1 260_3 2.70667
+5 260_3 260_4 0.233333
+6 260_4 *263 0
+7 260_4 260_5 2.05333
+8 260_5 *264 0
+9 260_5 260_6 0.56
+10 260_6 *265 0
+*END
+*D_NET *266 0.00032784
+*CONN
+*P *266 O
+*I *267 I *L 0.0265312
+*I *268 I *L 0.0268633
+*I *269 I *L 0.0265312
+*I *270 I *L 0.0222369
+*CAP
+1 266_1 4.704e-05
+2 266_2 4.704e-05
+3 266_3 8.64e-05
+4 266_4 0.00010656
+5 266_5 4.08e-05
+*RES
+1 *266 266_1 1.30667
+2 266_1 266_2 1.30667
+3 266_2 *267 0
+4 266_2 266_3 0.56
+5 266_3 *268 0
+6 266_3 266_4 0.933333
+7 266_4 *269 0
+8 266_1 266_5 0.466667
+9 266_5 *270 0
+*END
+*D_NET *271 0.00080376
+*CONN
+*P *271 O
+*I *272 I *L 0.0265312
+*I *273 I *L 0.0134094
+*I *274 I *L 0.0265312
+*I *275 I *L 0.0222369
+*CAP
+1 271_1 5.376e-05
+2 271_2 0.00029856
+3 271_3 2.04e-05
+4 271_4 6.12e-05
+5 271_5 0.00015504
+6 271_6 0.00011496
+7 271_7 9.984e-05
+*RES
+1 *271 271_1 1.49333
+2 271_1 271_2 4.29333
+3 271_2 271_3 0.233333
+4 271_3 *272 0
+5 271_3 271_4 0.7
+6 271_4 271_5 1.77333
+7 271_5 *273 0
+8 271_4 271_6 2.19333
+9 271_6 *274 0
+10 271_1 271_7 0.973333
+11 271_7 *275 0
+*END
+*D_NET *276 0.0004644
+*CONN
+*I *277 O *D DFFSR
+*I *278 I *L 0.0222369
+*I *279 I *L 0.0268633
+*I *280 I *L 0.0134147
+*CAP
+1 276_1 0.00026328
+2 276_2 8.64e-05
+3 276_3 1.344e-05
+4 276_4 0.00010128
+*RES
+1 *277 276_1 3.11333
+2 276_1 276_2 0.56
+3 276_2 *278 0
+4 276_1 276_3 0.373333
+5 276_3 *279 0
+6 276_1 276_4 2.14667
+7 276_4 *280 0
+*END
+*D_NET *281 0.00029832
+*CONN
+*I *282 O *D NOR2X1
+*I *283 I *L 0.022204
+*I *284 I *L 0.0177118
+*I *285 I *L 0.0222511
+*CAP
+1 281_1 9.84e-05
+2 281_2 0
+3 281_3 6.072e-05
+4 281_4 4.08e-05
+5 281_5 9.84e-05
+*RES
+1 *282 281_1 0.866667
+2 281_1 281_2 0
+3 281_2 *283 0
+4 281_1 281_3 1.35333
+5 281_3 281_4 0.466667
+6 281_4 *284 0
+7 281_3 281_5 0.84
+8 281_5 *285 0
+*END
+*D_NET *286 0.00032112
+*CONN
+*I *287 O *D DFFSR
+*I *288 I *L 0.0134147
+*I *289 I *L 0.0222369
+*I *290 I *L 0.0134094
+*CAP
+1 286_1 0.00017544
+2 286_2 0
+3 286_3 8.808e-05
+4 286_4 5.76e-05
+*RES
+1 *287 286_1 2.00667
+2 286_1 286_2 0
+3 286_2 *288 0
+4 286_2 286_3 1.44667
+5 286_3 *289 0
+6 286_3 286_4 0.373333
+7 286_4 *290 0
+*END
+*D_NET *291 0.00054816
+*CONN
+*I *292 O *D NOR2X1
+*I *293 I *L 0.022204
+*I *294 I *L 0.0180112
+*I *295 I *L 0.0226301
+*CAP
+1 291_1 0.0004368
+2 291_2 0
+3 291_3 5.04e-05
+4 291_4 0
+5 291_5 6.096e-05
+*RES
+1 *292 291_1 6.53333
+2 291_1 291_2 0
+3 291_2 *293 0
+4 291_1 291_3 1.4
+5 291_3 291_4 0
+6 291_4 *294 0
+7 291_3 291_5 1.02667
+8 291_5 *295 0
+*END
+*D_NET *296 0.00062568
+*CONN
+*I *297 O *D DFFSR
+*I *298 I *L 0.0222511
+*I *299 I *L 0.0134094
+*I *300 I *L 0.0135592
+*CAP
+1 296_1 0.00016968
+2 296_2 7.8e-05
+3 296_3 8.064e-05
+4 296_4 8.16e-05
+5 296_5 0.00021576
+*RES
+1 *297 296_1 2.38
+2 296_1 296_2 0.606667
+3 296_2 *298 0
+4 296_1 296_3 2.24
+5 296_3 296_4 0.933333
+6 296_4 *299 0
+7 296_3 296_5 4.99333
+8 296_5 *300 0
+*END
+*D_NET *301 0.00110448
+*CONN
+*I *302 O *D DFFSR
+*I *303 I *L 0.0134094
+*I *304 I *L 0.0265312
+*I *305 I *L 0.0134147
+*CAP
+1 301_1 9.456e-05
+2 301_2 0.0001548
+3 301_3 0.00051192
+4 301_4 0.0001188
+5 301_5 0.0002244
+*RES
+1 *302 301_1 1.96
+2 301_1 301_2 2.1
+3 301_2 *303 0
+4 301_1 301_3 4.48667
+5 301_3 301_4 1.07333
+6 301_4 *304 0
+7 301_3 301_5 2.56667
+8 301_5 *305 0
+*END
+*D_NET *306 0.00052968
+*CONN
+*I *307 O *D DFFSR
+*I *308 I *L 0.0134094
+*I *309 I *L 0.0134147
+*I *310 I *L 0.0265312
+*CAP
+1 306_1 0
+2 306_2 0.00011472
+3 306_3 0.00028536
+4 306_4 0.0001296
+*RES
+1 *307 306_1 0
+2 306_1 306_2 2.52
+3 306_2 *308 0
+4 306_1 306_3 3.59333
+5 306_3 *309 0
+6 306_3 306_4 0.84
+7 306_4 *310 0
+*END
+*D_NET *311 0.000822
+*CONN
+*I *312 O *D DFFSR
+*I *313 I *L 0.0265312
+*I *314 I *L 0.0134094
+*I *315 I *L 0.0134147
+*CAP
+1 311_1 0
+2 311_2 0.00029136
+3 311_3 5.76e-05
+4 311_4 0.000108
+5 311_5 0.00036504
+*RES
+1 *312 311_1 0
+2 311_1 311_2 4.76
+3 311_2 311_3 0.373333
+4 311_3 *313 0
+5 311_2 311_4 0.7
+6 311_4 *314 0
+7 311_1 311_5 7.14
+8 311_5 *315 0
+*END
+*D_NET *316 0.00047376
+*CONN
+*I *317 O *D DFFSR
+*I *318 I *L 0.0524659
+*I *319 I *L 0.0134094
+*I *320 I *L 0.0134147
+*CAP
+1 316_1 0.0001224
+2 316_2 0
+3 316_3 0.00017088
+4 316_4 2.304e-05
+5 316_5 0.00015744
+*RES
+1 *317 316_1 1.4
+2 316_1 316_2 0
+3 316_2 *318 0
+4 316_2 316_3 1.74667
+5 316_3 316_4 0.44
+6 316_4 *319 0
+7 316_3 316_5 2.77333
+8 316_5 *320 0
+*END
+*D_NET *321 0.00048144
+*CONN
+*P *321 O
+*I *322 I *L 0.0177118
+*I *323 I *L 0.0222369
+*I *324 I *L 0.0134094
+*CAP
+1 321_1 0.0001836
+2 321_2 0
+3 321_3 5.376e-05
+4 321_4 4.08e-05
+5 321_5 0.00020328
+*RES
+1 *321 321_1 2.1
+2 321_1 321_2 0
+3 321_2 *322 0
+4 321_2 321_3 1.49333
+5 321_3 321_4 0.466667
+6 321_4 *323 0
+7 321_3 321_5 3.31333
+8 321_5 *324 0
+*END
+*D_NET *325 0.0005136
+*CONN
+*I *326 O *D NOR2X1
+*I *327 I *L 0.0265312
+*I *328 I *L 0.0227534
+*I *329 I *L 0.0180033
+*CAP
+1 325_1 0
+2 325_2 8.784e-05
+3 325_3 0.00020976
+4 325_4 0.000216
+*RES
+1 *326 325_1 0
+2 325_1 325_2 1.77333
+3 325_2 *327 0
+4 325_1 325_3 3.82667
+5 325_3 *328 0
+6 325_3 325_4 1.4
+7 325_4 *329 0
+*END
+*D_NET *330 0.00036576
+*CONN
+*I *331 O *D AND2X2
+*I *332 I *L 0.0270702
+*I *333 I *L 0.0180112
+*I *334 I *L 0.0435905
+*CAP
+1 330_1 8.64e-05
+2 330_2 7.392e-05
+3 330_3 4.08e-05
+4 330_4 0.00016464
+*RES
+1 *331 330_1 0.56
+2 330_1 *332 0
+3 330_1 330_2 2.05333
+4 330_2 330_3 0.466667
+5 330_3 *333 0
+6 330_2 330_4 2.30667
+7 330_4 *334 0
+*END
+*D_NET *335 0.00046512
+*CONN
+*I *336 O *D NOR2X1
+*I *337 I *L 0.0180112
+*I *338 I *L 0.022204
+*I *339 I *L 0.0265613
+*CAP
+1 335_1 0.0001428
+2 335_2 2.04e-05
+3 335_3 0.00026136
+4 335_4 2.04e-05
+5 335_5 2.016e-05
+*RES
+1 *336 335_1 1.63333
+2 335_1 335_2 0.233333
+3 335_2 *337 0
+4 335_2 335_3 3.59333
+5 335_3 335_4 0.233333
+6 335_4 *338 0
+7 335_4 335_5 0.56
+8 335_5 *339 0
+*END
+*D_NET *340 0.00022992
+*CONN
+*I *341 O *D NAND2X1
+*I *342 I *L 0.0270702
+*I *343 I *L 0.0270702
+*I *344 I *L 0.0177118
+*CAP
+1 340_1 4.704e-05
+2 340_2 0.0001152
+3 340_3 4.08e-05
+4 340_4 2.688e-05
+*RES
+1 *341 340_1 1.30667
+2 340_1 340_2 0.746667
+3 340_2 *342 0
+4 340_1 340_3 0.466667
+5 340_3 *343 0
+6 340_1 340_4 0.746667
+7 340_4 *344 0
+*END
+*D_NET *345 0.00047544
+*CONN
+*I *346 O *D INVX2
+*I *347 I *L 0.022204
+*I *348 I *L 0.022204
+*I *349 I *L 0.0524659
+*CAP
+1 345_1 0.0001428
+2 345_2 2.04e-05
+3 345_3 2.688e-05
+4 345_4 2.016e-05
+5 345_5 0.0002652
+*RES
+1 *346 345_1 1.63333
+2 345_1 345_2 0.233333
+3 345_2 *347 0
+4 345_2 345_3 0.746667
+5 345_3 345_4 0.56
+6 345_4 *348 0
+7 345_3 345_5 3.03333
+8 345_5 *349 0
+*END
+*D_NET *350 0.00134712
+*CONN
+*I *351 O *D NAND3X1
+*I *352 I *L 0.0270702
+*I *353 I *L 0.0270702
+*I *354 I *L 0.0134094
+*CAP
+1 350_1 0.00042144
+2 350_2 0.00065112
+3 350_3 2.688e-05
+4 350_4 0.00024768
+*RES
+1 *351 350_1 4.30667
+2 350_1 350_2 7.88667
+3 350_2 *352 0
+4 350_1 350_3 0.746667
+5 350_3 *353 0
+6 350_1 350_4 2.28
+7 350_4 *354 0
+*END
+*D_NET *355 0.00038256
+*CONN
+*I *356 O *D INVX1
+*I *357 I *L 0.0226301
+*I *358 I *L 0.0270702
+*I *359 I *L 0.0265312
+*CAP
+1 355_1 0.0001308
+2 355_2 5.376e-05
+3 355_3 0.0001236
+4 355_4 1.344e-05
+5 355_5 6.096e-05
+*RES
+1 *356 355_1 1.63333
+2 355_1 355_2 1.49333
+3 355_2 *357 0
+4 355_1 355_3 1.03333
+5 355_3 355_4 0.373333
+6 355_4 *358 0
+7 355_3 355_5 1.02667
+8 355_5 *359 0
+*END
+*D_NET *360 0.00116424
+*CONN
+*P *360 O
+*I *361 I *L 0.0265312
+*I *362 I *L 0.0134094
+*I *363 I *L 0.0265312
+*CAP
+1 360_1 2.688e-05
+2 360_2 8.4e-06
+3 360_3 2.04e-05
+4 360_4 0.00048936
+5 360_5 0.0006192
+*RES
+1 *360 360_1 0.746667
+2 360_1 360_2 0.233333
+3 360_2 360_3 0.233333
+4 360_3 *361 0
+5 360_3 360_4 5.92667
+6 360_4 *362 0
+7 360_2 360_5 5
+8 360_5 *363 0
+*END
+*D_NET *364 0.0003936
+*CONN
+*I *365 O *D NAND3X1
+*I *366 I *L 0.0270702
+*I *367 I *L 0.0270702
+*CAP
+1 364_1 0.0002784
+2 364_2 0.0001152
+*RES
+1 *365 364_1 2.61333
+2 364_1 *366 0
+3 364_1 364_2 0.746667
+4 364_2 *367 0
+*END
+*D_NET *368 0.00014352
+*CONN
+*I *369 O *D DFFSR
+*I *370 I *L 0.0177358
+*I *371 I *L 0.0134094
+*CAP
+1 368_1 5.376e-05
+2 368_2 2.016e-05
+3 368_3 6.96e-05
+*RES
+1 *369 368_1 1.49333
+2 368_1 368_2 0.56
+3 368_2 *370 0
+4 368_1 368_3 0.933333
+5 368_3 *371 0
+*END
+*D_NET *372 0.00052968
+*CONN
+*I *373 O *D DFFSR
+*I *374 I *L 0.0222511
+*I *375 I *L 0.0134094
+*CAP
+1 372_1 0.0001728
+2 372_2 0.00035688
+*RES
+1 *373 372_1 1.12
+2 372_1 *374 0
+3 372_1 372_2 5.74
+4 372_2 *375 0
+*END
+*D_NET *376 0.00037488
+*CONN
+*P *376 O
+*I *377 I *L 0.0135592
+*I *378 I *L 0.0134094
+*CAP
+1 376_1 0.00021984
+2 376_2 9.408e-05
+3 376_3 6.096e-05
+*RES
+1 *376 376_1 2.17333
+2 376_1 376_2 2.61333
+3 376_2 *377 0
+4 376_1 376_3 1.02667
+5 376_3 *378 0
+*END
+*D_NET *379 0.00042336
+*CONN
+*I *380 O *D NOR2X1
+*I *381 I *L 0.0270702
+*I *382 I *L 0.0180033
+*CAP
+1 379_1 0.00015528
+2 379_2 0.0001596
+3 379_3 0.00010848
+*RES
+1 *380 379_1 3.31333
+2 379_1 379_2 1.54
+3 379_2 *381 0
+4 379_1 379_3 1.68
+5 379_3 *382 0
+*END
+*D_NET *383 0.00024144
+*CONN
+*I *384 O *D DFFSR
+*I *385 I *L 0.0134147
+*I *386 I *L 0.0134094
+*CAP
+1 383_1 8.64e-05
+2 383_2 0.00015504
+*RES
+1 *384 383_1 0.56
+2 383_1 *385 0
+3 383_1 383_2 1.77333
+4 383_2 *386 0
+*END
+*D_NET *387 0.00038928
+*CONN
+*I *388 O *D DFFSR
+*I *389 I *L 0.0134147
+*I *390 I *L 0.0134094
+*CAP
+1 387_1 8.64e-05
+2 387_2 0.00030288
+*RES
+1 *388 387_1 0.56
+2 387_1 *389 0
+3 387_1 387_2 4.57333
+4 387_2 *390 0
+*END
+*D_NET *391 0.0005208
+*CONN
+*I *392 O *D INVX1
+*I *393 I *L 0.0265339
+*I *394 I *L 0.0268633
+*CAP
+1 391_1 0.0004344
+2 391_2 8.64e-05
+*RES
+1 *392 391_1 6.06667
+2 391_1 *393 0
+3 391_1 391_2 0.56
+4 391_2 *394 0
+*END
+*D_NET *395 0.00033096
+*CONN
+*I *396 O *D DFFSR
+*I *397 I *L 0.0134147
+*I *398 I *L 0.0134094
+*CAP
+1 395_1 8.64e-05
+2 395_2 0.00024456
+*RES
+1 *396 395_1 0.56
+2 395_1 *397 0
+3 395_1 395_2 3.12667
+4 395_2 *398 0
+*END
+*D_NET *399 0.00013536
+*CONN
+*I *400 O *D INVX1
+*I *401 I *L 0.0265339
+*I *402 I *L 0.0268633
+*CAP
+1 399_1 2.016e-05
+2 399_2 0.0001152
+*RES
+1 *400 399_1 0.56
+2 399_1 *401 0
+3 399_1 399_2 0.746667
+4 399_2 *402 0
+*END
+*D_NET *403 0.00032256
+*CONN
+*I *404 O *D DFFSR
+*I *405 I *L 0.0134147
+*I *406 I *L 0.0134094
+*CAP
+1 403_1 0.00020376
+2 403_2 5.76e-05
+3 403_3 6.12e-05
+*RES
+1 *404 403_1 2.66
+2 403_1 403_2 0.373333
+3 403_2 *405 0
+4 403_1 403_3 0.7
+5 403_3 *406 0
+*END
+*D_NET *407 0.000774
+*CONN
+*I *408 O *D INVX1
+*I *409 I *L 0.0265339
+*I *410 I *L 0.0268633
+*CAP
+1 407_1 0.00036096
+2 407_2 0.00041304
+*RES
+1 *408 407_1 8.02667
+2 407_1 *409 0
+3 407_1 407_2 6.02
+4 407_2 *410 0
+*END
+*D_NET *411 0.00024144
+*CONN
+*I *412 O *D DFFSR
+*I *413 I *L 0.0134147
+*I *414 I *L 0.0134094
+*CAP
+1 411_1 8.64e-05
+2 411_2 0.00015504
+*RES
+1 *412 411_1 0.56
+2 411_1 *413 0
+3 411_1 411_2 1.77333
+4 411_2 *414 0
+*END
+*D_NET *415 0.00048192
+*CONN
+*I *416 O *D INVX1
+*I *417 I *L 0.0265339
+*I *418 I *L 0.0268633
+*CAP
+1 415_1 8.4e-06
+2 415_2 0.0001344
+3 415_3 0.00033912
+*RES
+1 *416 415_1 0.233333
+2 415_1 415_2 1.86667
+3 415_2 *417 0
+4 415_1 415_3 6.58
+5 415_3 *418 0
+*END
+*D_NET *419 0.00023424
+*CONN
+*I *420 O *D DFFSR
+*I *421 I *L 0.0134147
+*I *422 I *L 0.0134094
+*CAP
+1 419_1 8.64e-05
+2 419_2 0.00014784
+*RES
+1 *420 419_1 0.56
+2 419_1 *421 0
+3 419_1 419_2 4.10667
+4 419_2 *422 0
+*END
+*D_NET *423 0.00022344
+*CONN
+*I *424 O *D INVX1
+*I *425 I *L 0.0268633
+*I *426 I *L 0.0265339
+*CAP
+1 423_1 4.704e-05
+2 423_2 8.16e-05
+3 423_3 9.48e-05
+*RES
+1 *424 423_1 1.30667
+2 423_1 423_2 0.933333
+3 423_2 *425 0
+4 423_1 423_3 1.63333
+5 423_3 *426 0
+*END
+*D_NET *427 0.00053952
+*CONN
+*I *428 O *D DFFSR
+*I *429 I *L 0.0134094
+*I *430 I *L 0.0134147
+*CAP
+1 427_1 8.16e-05
+2 427_2 9.384e-05
+3 427_3 0.00036408
+*RES
+1 *428 427_1 0.933333
+2 427_1 427_2 1.07333
+3 427_2 *429 0
+4 427_1 427_3 4.24667
+5 427_3 *430 0
+*END
+*D_NET *431 0.0004224
+*CONN
+*I *432 O *D INVX1
+*I *433 I *L 0.0268633
+*I *434 I *L 0.0265339
+*CAP
+1 431_1 0.00026064
+2 431_2 1.344e-05
+3 431_3 0.00014832
+*RES
+1 *432 431_1 3.24
+2 431_1 431_2 0.373333
+3 431_2 *433 0
+4 431_1 431_3 3.45333
+5 431_3 *434 0
+*END
+*D_NET *435 0.00028992
+*CONN
+*I *436 O *D DFFSR
+*I *437 I *L 0.0134094
+*I *438 I *L 0.0134147
+*CAP
+1 435_1 0
+2 435_2 0.00018864
+3 435_3 0.00010128
+*RES
+1 *436 435_1 0
+2 435_1 435_2 4.57333
+3 435_2 *437 0
+4 435_1 435_3 2.14667
+5 435_3 *438 0
+*END
+*D_NET *439 0.00060072
+*CONN
+*I *440 O *D INVX1
+*I *441 I *L 0.0268633
+*I *442 I *L 0.0265339
+*CAP
+1 439_1 0.00048216
+2 439_2 0.00011856
+*RES
+1 *440 439_1 5.27333
+2 439_1 *441 0
+3 439_1 439_2 1.4
+4 439_2 *442 0
+*END
+*D_NET *443 0.0003156
+*CONN
+*I *444 O *D DFFSR
+*I *445 I *L 0.0134147
+*I *446 I *L 0.0134094
+*CAP
+1 443_1 0.0001632
+2 443_2 2.016e-05
+3 443_3 0.00013224
+*RES
+1 *444 443_1 1.86667
+2 443_1 443_2 0.56
+3 443_2 *445 0
+4 443_1 443_3 1.44667
+5 443_3 *446 0
+*END
+*D_NET *447 0.0002424
+*CONN
+*I *448 O *D XNOR2X1
+*I *449 I *L 0.0265613
+*I *450 I *L 0.0265312
+*CAP
+1 447_1 0.00012
+2 447_2 0.0001224
+*RES
+1 *448 447_1 1.49333
+2 447_1 *449 0
+3 447_1 447_2 1.4
+4 447_2 *450 0
+*END
+*D_NET *451 0.00039552
+*CONN
+*I *452 O *D XNOR2X1
+*I *453 I *L 0.0270702
+*I *454 I *L 0.0268633
+*CAP
+1 451_1 0.00017664
+2 451_2 3.36e-05
+3 451_3 0.00018528
+*RES
+1 *452 451_1 2.24
+2 451_1 451_2 0.933333
+3 451_2 *453 0
+4 451_1 451_3 2.08
+5 451_3 *454 0
+*END
+*D_NET *455 0.00021048
+*CONN
+*P *455 O
+*I *456 I *L 0.0180112
+*I *457 I *L 0.0227534
+*CAP
+1 455_1 0.0001428
+2 455_2 0
+3 455_3 6.768e-05
+*RES
+1 *455 455_1 1.63333
+2 455_1 455_2 0
+3 455_2 *456 0
+4 455_2 455_3 1.21333
+5 455_3 *457 0
+*END
+*D_NET *458 0.00016896
+*CONN
+*I *459 O *D INVX1
+*I *460 I *L 0.0177358
+*I *461 I *L 0.0222369
+*CAP
+1 458_1 0.00011136
+2 458_2 5.76e-05
+*RES
+1 *459 458_1 1.86667
+2 458_1 *460 0
+3 458_1 458_2 0.373333
+4 458_2 *461 0
+*END
+*D_NET *462 0.0003192
+*CONN
+*P *462 O
+*I *463 I *L 0.0180101
+*I *464 I *L 0.0227534
+*CAP
+1 462_1 0.0001896
+2 462_2 0.0001296
+*RES
+1 *462 462_1 3.26667
+2 462_1 *463 0
+3 462_1 462_2 0.84
+4 462_2 *464 0
+*END
+*D_NET *465 0.000606
+*CONN
+*P *465 O
+*I *466 I *L 0.0227534
+*I *467 I *L 0.0180101
+*CAP
+1 465_1 2.016e-05
+2 465_2 0.00033624
+3 465_3 0.0002496
+*RES
+1 *465 465_1 0.56
+2 465_1 465_2 3.78
+3 465_2 *466 0
+4 465_1 465_3 2.42667
+5 465_3 *467 0
+*END
+*D_NET *468 0.0004404
+*CONN
+*I *469 O *D INVX1
+*I *470 I *L 0.0222511
+*I *471 I *L 0.0265312
+*CAP
+1 468_1 0.0001428
+2 468_2 2.04e-05
+3 468_3 0.0002772
+*RES
+1 *469 468_1 1.63333
+2 468_1 468_2 0.233333
+3 468_2 *470 0
+4 468_2 468_3 3.5
+5 468_3 *471 0
+*END
+*D_NET *472 0.000144
+*CONN
+*I *473 O *D INVX1
+*I *474 I *L 0.0222511
+*I *475 I *L 0.0222511
+*CAP
+1 472_1 8.64e-05
+2 472_2 5.76e-05
+*RES
+1 *473 472_1 0.56
+2 472_1 *474 0
+3 472_1 472_2 0.373333
+4 472_2 *475 0
+*END
+*D_NET *476 0.00035616
+*CONN
+*I *477 O *D NOR2X1
+*I *478 I *L 0.0226301
+*I *479 I *L 0.0268737
+*CAP
+1 476_1 0.00021384
+2 476_2 2.04e-05
+3 476_3 0.00012192
+*RES
+1 *477 476_1 2.94
+2 476_1 476_2 0.233333
+3 476_2 *478 0
+4 476_2 476_3 2.05333
+5 476_3 *479 0
+*END
+*D_NET *480 0.00041904
+*CONN
+*P *480 O
+*I *481 I *L 0.0134094
+*I *482 I *L 0.022204
+*CAP
+1 480_1 2.016e-05
+2 480_2 0.0003312
+3 480_3 6.768e-05
+*RES
+1 *480 480_1 0.56
+2 480_1 480_2 3.64
+3 480_2 *481 0
+4 480_1 480_3 1.21333
+5 480_3 *482 0
+*END
+*D_NET *483 0.00054168
+*CONN
+*I *484 O *D NAND3X1
+*I *485 I *L 0.0226301
+*I *486 I *L 0.0134094
+*CAP
+1 483_1 0.000216
+2 483_2 0.00032568
+*RES
+1 *484 483_1 1.4
+2 483_1 *485 0
+3 483_1 483_2 4.71333
+4 483_2 *486 0
+*END
+*D_NET *487 0.00033936
+*CONN
+*I *488 O *D DFFSR
+*I *489 I *L 0.0134094
+*I *490 I *L 0.0134147
+*CAP
+1 487_1 0
+2 487_2 2.688e-05
+3 487_3 0.00031248
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generated by cgit v1.2.3 (git 2.25.1) at 2024-06-11 12:32:59 +0000