Merge tag 'upstream/0.84.40+dfsg.1'

Upstream version 0.84.40+dfsg.1

3 files changed, 0 insertions, 374 deletions

diff --git a/data/models/LM324.model b/data/models/LM324.model
deleted file mode 100644
index 66e6cef..0000000
--- a/data/models/LM324.model
+++ /dev/null
@@ -1,118 +0,0 @@
-*//////////////////////////////////////////////////////////////////////
-* (C) National Semiconductor, Inc.
-* Models developed and under copyright by:
-* National Semiconductor, Inc.  
-
-*/////////////////////////////////////////////////////////////////////
-* Legal Notice: This material is intended for free software support.
-* The file may be copied, and distributed; however, reselling the 
-* material is illegal
-
-*////////////////////////////////////////////////////////////////////
-* For ordering or technical information on these models, contact:
-* National Semiconductor's Customer Response Center
-*                 7:00 A.M.--7:00 P.M.  U.S. Central Time
-*                                (800) 272-9959
-* For Applications support, contact the Internet address:
-*  amps-apps@galaxy.nsc.com
-
-*//////////////////////////////////////////////////////////
-*LM324 Low Power Quad OPERATIONAL AMPLIFIER MACRO-MODEL
-*//////////////////////////////////////////////////////////
-*
-* connections:      non-inverting input
-*                   |   inverting input
-*                   |   |   positive power supply
-*                   |   |   |   negative power supply
-*                   |   |   |   |   output
-*                   |   |   |   |   |
-*                   |   |   |   |   |
-.SUBCKT LM324       1   2  99  50  28
-*
-*Features:
-*Eliminates need for dual supplies
-*Large DC voltage gain =             100dB
-*High bandwidth =                     1MHz
-*Low input offset voltage =            2mV
-*Wide supply range =        +-1.5V to +-16V
-*
-*NOTE: Model is for single device only and simulated
-*      supply current is 1/4 of total device current.
-*      Output crossover distortion with dual supplies
-*      is not modeled.
-*
-****************INPUT STAGE**************
-*
-IOS 2 1 5N
-*^Input offset current
-R1 1 3 500K
-R2 3 2 500K
-I1 99 4 100U
-R3 5 50 517
-R4 6 50 517
-Q1 5 2 4 QX
-Q2 6 7 4 QX
-*Fp2=1.2 MHz
-C4 5 6 128.27P
-*
-***********COMMON MODE EFFECT***********
-*
-I2 99 50 75U
-*^Quiescent supply current
-EOS 7 1 POLY(1) 16 49 2E-3 1
-*Input offset voltage.^
-R8 99 49 60K
-R9 49 50 60K
-*
-*********OUTPUT VOLTAGE LIMITING********
-V2 99 8 1.63
-D1 9 8 DX
-D2 10 9 DX
-V3 10 50 .635
-*
-**************SECOND STAGE**************
-*
-EH 99 98 99 49 1
-G1 98 9 POLY(1) 5 6 0 9.8772E-4 0 .3459
-*Fp1=7.86 Hz
-R5 98 9 101.2433MEG
-C3 98 9 200P
-*
-***************POLE STAGE***************
-*
-*Fp=2 MHz
-G3 98 15 9 49 1E-6
-R12 98 15 1MEG
-C5 98 15 7.9577E-14
-*
-*********COMMON-MODE ZERO STAGE*********
-*
-*Fpcm=10 KHz
-G4 98 16 3 49 5.6234E-8               
-L2 98 17 15.9M
-R13 17 16 1K
-*
-**************OUTPUT STAGE**************
-*
-F6 50 99 POLY(1) V6 300U 1
-E1 99 23 99 15 1
-R16 24 23 17.5
-D5 26 24 DX
-V6 26 22 .63V
-R17 23 25 17.5
-D6 25 27 DX
-V7 22 27 .63V
-V5 22 21 0.27V
-D4 21 15 DX
-V4 20 22 0.27V
-D3 15 20 DX
-L3 22 28 500P
-RL3 22 28 100K
-*
-***************MODELS USED**************
-*
-.MODEL DX D(IS=1E-15)
-.MODEL QX PNP(BF=1.111E3)
-*
-.ENDS
-
diff --git a/data/models/LM741.model b/data/models/LM741.model
deleted file mode 100644
index 7dcfbb2..0000000
--- a/data/models/LM741.model
+++ /dev/null
@@ -1,111 +0,0 @@
-*//////////////////////////////////////////////////////////////////////
-* (C) National Semiconductor, Inc.
-* Models developed and under copyright by:
-* National Semiconductor, Inc.
-
-*/////////////////////////////////////////////////////////////////////
-* Legal Notice: This material is intended for free software support.
-* The file may be copied, and distributed; however, reselling the
-*  material is illegal
-
-*////////////////////////////////////////////////////////////////////
-* For ordering or technical information on these models, contact:
-* National Semiconductor's Customer Response Center
-*                 7:00 A.M.--7:00 P.M.  U.S. Central Time
-*                                (800) 272-9959
-* For Applications support, contact the Internet address:
-*  amps-apps@galaxy.nsc.com
-
-*//////////////////////////////////////////////////////////
-*LM741 OPERATIONAL AMPLIFIER MACRO-MODEL
-*//////////////////////////////////////////////////////////
-*
-* connections:      non-inverting input
-*                   |   inverting input
-*                   |   |   positive power supply
-*                   |   |   |   negative power supply
-*                   |   |   |   |   output
-*                   |   |   |   |   |
-*                   |   |   |   |   |
-.SUBCKT LM741/NS    1   2  99  50  28
-*
-*Features:
-*Improved performance over industry standards
-*Plug-in replacement for LM709,LM201,MC1439,748
-*Input and output overload protection
-*
-****************INPUT STAGE**************
-*
-IOS 2 1 20N
-*^Input offset current
-R1 1 3 250K
-R2 3 2 250K
-I1 4 50 100U
-R3 5 99 517
-R4 6 99 517
-Q1 5 2 4 QX
-Q2 6 7 4 QX
-*Fp2=2.55 MHz
-C4 5 6 60.3614P
-*
-***********COMMON MODE EFFECT***********
-*
-I2 99 50 1.6MA
-*^Quiescent supply current
-EOS 7 1 POLY(1) 16 49 1E-3 1
-*Input offset voltage.^
-R8 99 49 40K
-R9 49 50 40K
-*
-*********OUTPUT VOLTAGE LIMITING********
-V2 99 8 1.63
-D1 9 8 DX
-D2 10 9 DX
-V3 10 50 1.63
-*
-**************SECOND STAGE**************
-*
-EH 99 98 99 49 1
-G1 98 9 5 6 2.1E-3
-*Fp1=5 Hz
-R5 98 9 95.493MEG
-C3 98 9 333.33P
-*
-***************POLE STAGE***************
-*
-*Fp=30 MHz
-G3 98 15 9 49 1E-6
-R12 98 15 1MEG
-C5 98 15 5.3052E-15
-*
-*********COMMON-MODE ZERO STAGE*********
-*
-*Fpcm=300 Hz
-G4 98 16 3 49 3.1623E-8
-L2 98 17 530.5M
-R13 17 16 1K
-*
-**************OUTPUT STAGE**************
-*
-F6 50 99 POLY(1) V6 450U 1
-E1 99 23 99 15 1
-R16 24 23 25
-D5 26 24 DX
-V6 26 22 0.65V
-R17 23 25 25
-D6 25 27 DX
-V7 22 27 0.65V
-V5 22 21 0.18V
-D4 21 15 DX
-V4 20 22 0.18V
-D3 15 20 DX
-L3 22 28 100P
-RL3 22 28 100K
-*
-***************MODELS USED**************
-*
-.MODEL DX D(IS=1E-15)
-.MODEL QX NPN(BF=625)
-*
-.ENDS
-*$
diff --git a/data/models/OP77.model b/data/models/OP77.model
deleted file mode 100644
index e319ee2..0000000
--- a/data/models/OP77.model
+++ /dev/null
@@ -1,145 +0,0 @@
-* OP77 SPICE Macro-model
-*  05/02 Rev A
-* SB, ADSiV apps
-* Typical values, Vsy=±15V
-* Copyright 2002 by Analog Devices
-*
-* Refer to "README.DOC" file for License Statement.  Use of this model
-* indicates your acceptance with the terms and provisions in the License Statement.
-*
-* Node assignments
-*               non-inverting input
-*               | inverting input
-*               | | positive supply
-*               | | |  negative supply
-*               | | |  |  output
-*               | | |  |  |
-*               | | |  |  |
-.SUBCKT OP77   1 2 99 50 34
-*
-* INPUT STAGE & POLE AT 100 MHZ
-*
-R3   5 51     6.8E3
-R4   6 51     6.8E3
-CIN  1  2     1.5E-12
-C2   5  6      3.5E-12
-I1   97 4      500E-6
-IOS  1  2     0.1E-9
-EOS  9  3     POLY(2)  (26, 28) (73, 98) 15E-6  1 1
-Q1   5  2  7  QX
-Q2   6  9  8  QX
-R5   7  4     50
-R6   8  4     50
-D1   2 36     DZ
-D2   1 36     DZ
-EN   3  1     10  0  1
-GN1  0  2     13  0  1
-GN2  0  1     16  0  1
-*
-EREF 98 0     28  0  1
-EP   97 0     99  0  1
-EM   51 0     50  0  1
-*
-* VOLTAGE NOISE SOURCE
-*
-DN1  35 10    DEN
-DN2  10 11    DEN
-VN1  35  0    DC 2
-VN2  0  11    DC 2
-*
-* CURRENT NOISE SOURCE
-*
-DN3  12 13    DIN
-DN4  13 14    DIN
-VN3  12  0    DC 2
-VN4  0  14    DC 2
-*
-* CURRENT NOISE SOURCE
-*
-DN5  15 16    DIN
-DN6  16 17    DIN
-VN5  15  0    DC 2
-VN6  0  17    DC 2
-*
-* GAIN STAGE & DOMINANT POLE AT 0.439 HZ
-*
-R7  18 98     1.45E7
-C3  18 98     25E-9
-G1  98 18     5  6  5.15E-3
-V2  97 19     1.5
-V3  20 51     1.5
-D3  18 19     DX
-D4  20 18     DX
-*
-* POLE/ZERO PAIR AT 1.5MHz/12.7MHz
-*
-R8  21 98     1E3
-R9  21 22     1.25E3
-C4  22 98     10E-12
-G2  98 21     18 28  1E-3
-*
-* POLE AT 2568 MHz
-*
-R10 23 98     1
-C5  23 98     62E-12
-G3  98 23     21 28  1
-*
-* POLE AT 2568 MHz
-*
-R11 24 98     1
-C6  24 98     62E-12
-G4  98 24     23 28  1
-*
-* POLE AT 2568 MHz
-*
-R14 27 98     1
-C8  27 98    62E-12
-G5  98 27     24 28  1
-*
-* COMMON-MODE GAIN NETWORK WITH ZERO AT 1 kHZ
-*
-R12 25 26     1E6
-C7  25 26     159.155E-12
-R13 26 98     1
-E2  25 98      POLY(2) 1 98 2 98 0 0.28 0.28
-*
-*PSRR=121dB
-EPSY 98 72 POLY(1) (99,50) 0 1
-RPS3 72 73 1E6
-CPS3 72 73 3E-9
-RPS4 73 98 1
-
-* OUTPUT STAGE
-*
-R15 28 99     100E3
-R16 28 50     100E3
-C9  28 50     1E-6
-ISY 99 50     250E-6
-R17 29 99     100
-R18 29 50     100
-L2  29 34     1E-9
-G6  32 50     27 29  10E-3
-G7  33 50     29 27  10E-3
-G8  29 99     99 27  10E-3
-G9  50 29     27 50  10E-3
-V4  30 29     1.3
-V5  29 31     3.8
-F1  29  0     V4  1
-F2  0  29     V5  1
-D5  27 30     DX
-D6  31 27     DX
-D7  99 32     DX
-D8  99 33     DX
-D9  50 32     DY
-D10 50 33     DY
-*
-* MODELS USED
-*
-.MODEL QX PNP(BF=5E5)
-.MODEL DX   D(IS=1E-12)
-.MODEL DY   D(IS=1E-15 BV=50)
-.MODEL DZ   D(IS=1E-15 BV=7.0)
-.MODEL DEN  D(IS=1E-12 RS=6.8E3 KF=1.95E-15 AF=1)
-.MODEL DIN  D(IS=1E-12 RS=77.3E-6 KF=3.38E-15 AF=1)
-.ENDS OP77
-*$