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authorClifford Wolf <clifford@clifford.at>2013-11-22 12:46:02 +0100
committerClifford Wolf <clifford@clifford.at>2013-11-22 12:46:02 +0100
commite4429c480ea224ab9b5b0a98dbf5d9661a291b11 (patch)
tree2f9ae640eff584aaacaae57ca47538a034541962 /README
parent18d003254ccdca6fd9cbfe59b7b27007873a26be (diff)
Enable {* .. *} feature per default (removes dependency to REJECT feature in flex)
Diffstat (limited to 'README')
-rw-r--r--README3
1 files changed, 1 insertions, 2 deletions
diff --git a/README b/README
index a5e3d597..29e99611 100644
--- a/README
+++ b/README
@@ -265,8 +265,7 @@ Verilog Attributes and non-standard features
- In addition to the (* ... *) attribute syntax, yosys supports
the non-standard {* ... *} attribute syntax to set default attributes
for everything that comes after the {* ... *} statement. (Reset
- by adding an empty {* *} statement.) The preprocessor define
- __YOSYS_ENABLE_DEFATTR__ must be set in order for this feature to be active.
+ by adding an empty {* *} statement.)
Workarounds for known build problems