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| author | Clifford Wolf <clifford@clifford.at> | 2015-08-14 10:56:05 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2015-08-14 10:56:05 +0200 |
| commit | 84bf862f7c58c2b69babf043ff5032f924a3ee4d (patch) | |
| tree | c19a405bc106c2472f1aaa46c36b189db3e5223f /manual/PRESENTATION_ExOth.tex | |
| parent | 80910d13a610886f4430fbd991ada78b2e586ada (diff) | |
Spell check (by Larry Doolittle)
Diffstat (limited to 'manual/PRESENTATION_ExOth.tex')
| -rw-r--r-- | manual/PRESENTATION_ExOth.tex | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/manual/PRESENTATION_ExOth.tex b/manual/PRESENTATION_ExOth.tex index 6bc44c5c..73f8bea2 100644 --- a/manual/PRESENTATION_ExOth.tex +++ b/manual/PRESENTATION_ExOth.tex @@ -34,7 +34,7 @@ are connected. \item Commands such as {\tt submod}, {\tt expose}, {\tt splice}, \dots can be used -to transform the design into an equivialent design that is easier to analyse. +to transform the design into an equivalent design that is easier to analyse. \item Commands such as {\tt eval} and {\tt sat} can be used to investigate the @@ -102,7 +102,7 @@ Symbolic Model Checking (SMC) is used to formally prove that a circuit has (or has not) a given property. \bigskip -One appliction is Formal Equivalence Checking: Proving that two circuits +One application is Formal Equivalence Checking: Proving that two circuits are identical. For example this is a very useful feature when debugging custom passes in Yosys. @@ -143,11 +143,11 @@ rename test test_mapped # apply the techmap only to test_mapped techmap -map techmap_01_map.v test_mapped -# create a miter circuit to test equivialence +# create a miter circuit to test equivalence miter -equiv -make_assert -make_outputs test_orig test_mapped miter flatten miter -# run equivialence check +# run equivalence check sat -verify -prove-asserts -show-inputs -show-outputs miter \end{lstlisting} |