SigSpec refactoring: change RTLIL::SigSpec::chunks() to be read-only, created interim RTLIL::SigSpec::chunks_rw()

1 files changed, 1 insertions, 1 deletions

diff --git a/passes/hierarchy/submod.cc b/passes/hierarchy/submod.cc
index fa8043c8..b983a840 100644
--- a/passes/hierarchy/submod.cc
+++ b/passes/hierarchy/submod.cc
@@ -164,7 +164,7 @@ struct SubmodWorker
 		for (RTLIL::Cell *cell : submod.cells) {
 			RTLIL::Cell *new_cell = new RTLIL::Cell(*cell);
 			for (auto &conn : new_cell->connections)
-				for (auto &c : conn.second.chunks())
+				for (auto &c : conn.second.chunks_rw())
 					if (c.wire != NULL) {
 						assert(wire_flags.count(c.wire) > 0);
 						c.wire = wire_flags[c.wire].new_wire;