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authorClifford Wolf <clifford@clifford.at>2014-08-02 20:54:30 +0200
committerClifford Wolf <clifford@clifford.at>2014-08-02 20:54:30 +0200
commitb6acbc82e6a2954d453188a9997da2a30731ddac (patch)
treec854457e5f6c04d1c5ed72ff7b0d32dd920955ef /passes/techmap
parent8e7361f128ce00a742412931efcf7cbe5795a39a (diff)
Bugfix in "techmap -extern"
Diffstat (limited to 'passes/techmap')
-rw-r--r--passes/techmap/techmap.cc1
1 files changed, 1 insertions, 0 deletions
diff --git a/passes/techmap/techmap.cc b/passes/techmap/techmap.cc
index c639cc48..74a51550 100644
--- a/passes/techmap/techmap.cc
+++ b/passes/techmap/techmap.cc
@@ -504,6 +504,7 @@ struct TechmapWorker
RTLIL::Wire *new_wire = tpl->addWire(port_name, wire);
wire->port_input = false;
+ wire->port_id = 0;
for (int i = 0; i < wire->width; i++) {
port_new2old_map[RTLIL::SigBit(new_wire, i)] = RTLIL::SigBit(wire, i);