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authorClifford Wolf <clifford@clifford.at>2014-12-27 03:04:50 +0100
committerClifford Wolf <clifford@clifford.at>2014-12-27 03:04:50 +0100
commit66ab88d7b0636c21d5df74f753ed379a799fd783 (patch)
treec8f96817b4926e4e938e0c732e240363b89d4bec /passes
parent88d08e8f24cb2d43907a9d28d65fedc9638554ca (diff)
More hashtable finetuning
Diffstat (limited to 'passes')
-rw-r--r--passes/cmds/delete.cc4
-rw-r--r--passes/cmds/splitnets.cc2
-rw-r--r--passes/opt/opt_clean.cc2
-rw-r--r--passes/opt/opt_const.cc2
-rw-r--r--passes/opt/opt_share.cc2
5 files changed, 6 insertions, 6 deletions
diff --git a/passes/cmds/delete.cc b/passes/cmds/delete.cc
index 4c8f16f4..5bf2a36b 100644
--- a/passes/cmds/delete.cc
+++ b/passes/cmds/delete.cc
@@ -91,8 +91,8 @@ struct DeletePass : public Pass {
continue;
}
- pool<RTLIL::Wire*, hash_ptr_ops> delete_wires;
- pool<RTLIL::Cell*, hash_ptr_ops> delete_cells;
+ pool<RTLIL::Wire*, hash_obj_ops> delete_wires;
+ pool<RTLIL::Cell*, hash_obj_ops> delete_cells;
pool<RTLIL::IdString> delete_procs;
pool<RTLIL::IdString> delete_mems;
diff --git a/passes/cmds/splitnets.cc b/passes/cmds/splitnets.cc
index 3b3fc208..2523c166 100644
--- a/passes/cmds/splitnets.cc
+++ b/passes/cmds/splitnets.cc
@@ -176,7 +176,7 @@ struct SplitnetsPass : public Pass {
module->rewrite_sigspecs(worker);
- pool<RTLIL::Wire*, hash_ptr_ops> delete_wires;
+ pool<RTLIL::Wire*, hash_obj_ops> delete_wires;
for (auto &it : worker.splitmap)
delete_wires.insert(it.first);
module->remove(delete_wires);
diff --git a/passes/opt/opt_clean.cc b/passes/opt/opt_clean.cc
index cb12b392..b387e038 100644
--- a/passes/opt/opt_clean.cc
+++ b/passes/opt/opt_clean.cc
@@ -262,7 +262,7 @@ void rmunused_module_signals(RTLIL::Module *module, bool purge_mode, bool verbos
}
- pool<RTLIL::Wire*, hash_ptr_ops> del_wires;
+ pool<RTLIL::Wire*, hash_obj_ops> del_wires;
int del_wires_count = 0;
for (auto wire : maybe_del_wires)
diff --git a/passes/opt/opt_const.cc b/passes/opt/opt_const.cc
index 9c1a1878..f78ea6cc 100644
--- a/passes/opt/opt_const.cc
+++ b/passes/opt/opt_const.cc
@@ -199,7 +199,7 @@ void replace_const_cells(RTLIL::Design *design, RTLIL::Module *module, bool cons
dict<RTLIL::SigSpec, RTLIL::SigSpec> invert_map;
TopoSort<RTLIL::Cell*, RTLIL::IdString::compare_ptr_by_name<RTLIL::Cell>> cells;
- dict<RTLIL::Cell*, std::set<RTLIL::SigBit>, hash_ptr_ops> cell_to_inbit;
+ dict<RTLIL::Cell*, std::set<RTLIL::SigBit>, hash_obj_ops> cell_to_inbit;
dict<RTLIL::SigBit, std::set<RTLIL::Cell*>> outbit_to_cell;
for (auto cell : module->cells())
diff --git a/passes/opt/opt_share.cc b/passes/opt/opt_share.cc
index 9bc30887..91bfd58a 100644
--- a/passes/opt/opt_share.cc
+++ b/passes/opt/opt_share.cc
@@ -41,7 +41,7 @@ struct OptShareWorker
CellTypes ct;
int total_count;
#ifdef USE_CELL_HASH_CACHE
- dict<const RTLIL::Cell*, std::string, hash_ptr_ops> cell_hash_cache;
+ dict<const RTLIL::Cell*, std::string, hash_obj_ops> cell_hash_cache;
#endif
#ifdef USE_CELL_HASH_CACHE